Linux IOMMU Development
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From: Jacob Pan <jacob.pan@linux.microsoft.com>
To: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Shyam Saini <shyamsaini@linux.microsoft.com>,
	iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, virtualization@lists.linux.dev,
	will@kernel.org, eric.auger@redhat.com, code@tyhicks.com,
	eahariha@linux.microsoft.com, vijayb@linux.microsoft.com,
	jacob.pan@linux.microsoft.com
Subject: Re: [PATCH 0/3] make MSI IOVA base address and its length configurable
Date: Tue, 21 Jan 2025 13:49:10 -0800	[thread overview]
Message-ID: <20250121134910.11797062@DESKTOP-0403QTC.> (raw)
In-Reply-To: <20250120142643.GM674319@ziepe.ca>

Hi Jason,

On Mon, 20 Jan 2025 10:26:43 -0400
Jason Gunthorpe <jgg@ziepe.ca> wrote:

> On Thu, Jan 16, 2025 at 03:23:04PM -0800, Shyam Saini wrote:
> > Hi,
> > 
> > Currently, the MSI_IOVA_BASE address is hard-coded to 0x80000000,
> > assuming that all platforms have this address available for MSI IOVA
> > reservation. However, this is not always the case, as some platforms
> > reserve this address for other purposes.  
> 
> Can you explain this some more? This address is in the kernel
> controlled IOVA space, there are few ways a platform can impact this.
> 
> How is the platform impacting it? Is the non-functional IOVA always
> reflected in the iommu_get_resv_regions()?

I don't know the platform impact but just to clarify, are you asking
whether this non-functional IOVA is also under IORT RMR or other FW
tables? I don't think it is.

But this special IOVA is reflected in iommu_get_resv_regions() the same
way as the hardcoded MSI_IOVA_BASE. So each iommu group's
reserved_regions should show.

> Why not avoid this conflict in your platform software?
I had the same question but it seems there is not enough difference
(than the standard smmu) to justify a platform code. i.e. platform
specific iommu_get_resv_regions(), is that what you are suggesting?

> > There was an [1] attempt to fix this problem by passing the MSI IOVA
> > base as a kernel command line parameter.   
> 
> Yuk
> 
> > In the previous attempt,
> > Will suggested reserving the MSI IOVA at runtime whenever there is a
> > conflict with the default MSI_IOVA_BASE. However, dynamically
> > reserving this address has debuggability concerns, as it becomes
> > difficult to track IOMMU mapping failures.  
> 
> Still, this approach seems like the best to me..
> 
> > This patch series aims to address the issue by introducing a new DTS
> > property, "arm,smmu-pci-msi-iova-data". This property allows the
> > configuration of MSI IOVA with a custom MSI base address and a
> > custom length for IOMMU/SMMU drivers. It accommodates platforms
> > that do not have the default MSI base address available for MSI
> > reservation.  
> 
> My understand was using DT to set kernel configurables was frowned
> upon? Ultimately MSI_IOVA_BASE is an arbitary choice by kernel
> software.
> 
> Jason


  reply	other threads:[~2025-01-21 21:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-16 23:23 [PATCH 0/3] make MSI IOVA base address and its length configurable Shyam Saini
2025-01-16 23:23 ` [PATCH 3/3] arm-smmu: use dts passed MSI IOVA address and length Shyam Saini
2025-01-16 23:23 ` [PATCH 2/3] iommu: consolidate MSI_IOVA macro definitions Shyam Saini
2025-01-16 23:23 ` [PATCH 1/3] dt-bindings: iommu: add "arm,smmu-pci-msi-iova-data" property Shyam Saini
2025-01-20 14:26 ` [PATCH 0/3] make MSI IOVA base address and its length configurable Jason Gunthorpe
2025-01-21 21:49   ` Jacob Pan [this message]
     [not found]   ` <67901659.170a0220.20b206.f1f5SMTPIN_ADDED_BROKEN@mx.google.com>
2025-01-22  0:19     ` Jason Gunthorpe
2025-01-30 23:21       ` Shyam Saini
2025-01-31  0:36         ` Jason Gunthorpe
2025-04-03 19:34           ` Shyam Saini
2025-04-03 23:26             ` Jason Gunthorpe

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