Linux IOMMU Development
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From: Sean Christopherson <seanjc@google.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Joerg Roedel <joro@8bytes.org>,
	David Woodhouse <dwmw2@infradead.org>,
	 Lu Baolu <baolu.lu@linux.intel.com>
Cc: kvm@vger.kernel.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org,  Sairaj Kodilkar <sarunkod@amd.com>,
	Vasant Hegde <vasant.hegde@amd.com>,
	 Maxim Levitsky <mlevitsk@redhat.com>,
	Joao Martins <joao.m.martins@oracle.com>,
	 Francesco Lavra <francescolavra.fl@gmail.com>,
	David Matlack <dmatlack@google.com>
Subject: [PATCH v2 38/59] iommu/amd: KVM: SVM: Infer IsRun from validity of pCPU destination
Date: Thu, 22 May 2025 17:59:43 -0700	[thread overview]
Message-ID: <20250523010004.3240643-39-seanjc@google.com> (raw)
In-Reply-To: <20250523010004.3240643-1-seanjc@google.com>

Infer whether or not a vCPU should be marked running from the validity of
the pCPU on which it is running.  amd_iommu_update_ga() already skips the
IRTE update if the pCPU is invalid, i.e. passing %true for is_run with an
invalid pCPU would be a blatant and egregrious KVM bug.

Tested-by: Sairaj Kodilkar <sarunkod@amd.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/svm/avic.c   | 11 +++++------
 drivers/iommu/amd/iommu.c | 14 +++++++++-----
 include/linux/amd-iommu.h |  6 ++----
 3 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 4747fb09aca4..c79648d96752 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -832,7 +832,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
 		entry = svm->avic_physical_id_entry;
 		if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)
 			amd_iommu_update_ga(entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK,
-					    true, pi_data.ir_data);
+					    pi_data.ir_data);
 
 		irqfd->irq_bypass_data = pi_data.ir_data;
 		list_add(&irqfd->vcpu_list, &svm->ir_list);
@@ -841,8 +841,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
 	return irq_set_vcpu_affinity(host_irq, NULL);
 }
 
-static inline int
-avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r)
+static inline int avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu)
 {
 	int ret = 0;
 	struct vcpu_svm *svm = to_svm(vcpu);
@@ -861,7 +860,7 @@ avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r)
 		return 0;
 
 	list_for_each_entry(irqfd, &svm->ir_list, vcpu_list) {
-		ret = amd_iommu_update_ga(cpu, r, irqfd->irq_bypass_data);
+		ret = amd_iommu_update_ga(cpu, irqfd->irq_bypass_data);
 		if (ret)
 			return ret;
 	}
@@ -923,7 +922,7 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 
 	WRITE_ONCE(kvm_svm->avic_physical_id_table[vcpu->vcpu_id], entry);
 
-	avic_update_iommu_vcpu_affinity(vcpu, h_physical_id, true);
+	avic_update_iommu_vcpu_affinity(vcpu, h_physical_id);
 
 	spin_unlock_irqrestore(&svm->ir_list_lock, flags);
 }
@@ -963,7 +962,7 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu)
 	 */
 	spin_lock_irqsave(&svm->ir_list_lock, flags);
 
-	avic_update_iommu_vcpu_affinity(vcpu, -1, 0);
+	avic_update_iommu_vcpu_affinity(vcpu, -1);
 
 	entry &= ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK;
 	svm->avic_physical_id_entry = entry;
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 5adc932b947e..bb804bbc916b 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3990,15 +3990,17 @@ int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
  * Update the pCPU information for an IRTE that is configured to post IRQs to
  * a vCPU, without issuing an IOMMU invalidation for the IRTE.
  *
- * This API is intended to be used when a vCPU is scheduled in/out (or stops
- * running for any reason), to do a fast update of IsRun and (conditionally)
- * Destination.
+ * If the vCPU is associated with a pCPU (@cpu >= 0), configure the Destination
+ * with the pCPU's APIC ID and set IsRun, else clear IsRun.  I.e. treat vCPUs
+ * that are associated with a pCPU as running.  This API is intended to be used
+ * when a vCPU is scheduled in/out (or stops running for any reason), to do a
+ * fast update of IsRun and (conditionally) Destination.
  *
  * Per the IOMMU spec, the Destination, IsRun, and GATag fields are not cached
  * and thus don't require an invalidation to ensure the IOMMU consumes fresh
  * information.
  */
-int amd_iommu_update_ga(int cpu, bool is_run, void *data)
+int amd_iommu_update_ga(int cpu, void *data)
 {
 	struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
 	struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -4015,8 +4017,10 @@ int amd_iommu_update_ga(int cpu, bool is_run, void *data)
 					APICID_TO_IRTE_DEST_LO(cpu);
 		entry->hi.fields.destination =
 					APICID_TO_IRTE_DEST_HI(cpu);
+		entry->lo.fields_vapic.is_run = true;
+	} else {
+		entry->lo.fields_vapic.is_run = false;
 	}
-	entry->lo.fields_vapic.is_run = is_run;
 
 	return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
 				ir_data->irq_2_irte.index, entry);
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index 99b4fa9a0296..fe0e16ffe0e5 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -30,8 +30,7 @@ static inline void amd_iommu_detect(void) { }
 /* IOMMU AVIC Function */
 extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
 
-extern int
-amd_iommu_update_ga(int cpu, bool is_run, void *data);
+extern int amd_iommu_update_ga(int cpu, void *data);
 
 extern int amd_iommu_activate_guest_mode(void *data);
 extern int amd_iommu_deactivate_guest_mode(void *data);
@@ -44,8 +43,7 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
 	return 0;
 }
 
-static inline int
-amd_iommu_update_ga(int cpu, bool is_run, void *data)
+static inline int amd_iommu_update_ga(int cpu, void *data)
 {
 	return 0;
 }
-- 
2.49.0.1151.ga128411c76-goog


  parent reply	other threads:[~2025-05-23  1:01 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-23  0:59 [PATCH v2 00/59] KVM: iommu: Overhaul device posted IRQs support Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 01/59] KVM: x86: Pass new routing entries and irqfd when updating IRTEs Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 02/59] KVM: SVM: Track per-vCPU IRTEs using kvm_kernel_irqfd structure Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 03/59] KVM: SVM: Delete IRTE link from previous vCPU before setting new IRTE Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 04/59] iommu/amd: KVM: SVM: Delete now-unused cached/previous GA tag fields Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 05/59] KVM: SVM: Delete IRTE link from previous vCPU irrespective of new routing Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 06/59] KVM: SVM: Drop pointless masking of default APIC base when setting V_APIC_BAR Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 07/59] KVM: SVM: Drop pointless masking of kernel page pa's with AVIC HPA masks Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 08/59] KVM: SVM: Add helper to deduplicate code for getting AVIC backing page Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 09/59] KVM: SVM: Drop vcpu_svm's pointless avic_backing_page field Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 10/59] KVM: SVM: Inhibit AVIC if ID is too big instead of rejecting vCPU creation Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 11/59] KVM: SVM: Drop redundant check in AVIC code on ID during " Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 12/59] KVM: SVM: Track AVIC tables as natively sized pointers, not "struct pages" Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 13/59] KVM: SVM: Drop superfluous "cache" of AVIC Physical ID entry pointer Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 14/59] KVM: VMX: Move enable_ipiv knob to common x86 Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 15/59] KVM: SVM: Add enable_ipiv param, never set IsRunning if disabled Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 16/59] KVM: SVM: Disable (x2)AVIC IPI virtualization if CPU has erratum #1235 Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 17/59] KVM: VMX: Suppress PI notifications whenever the vCPU is put Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 18/59] KVM: SVM: Add a comment to explain why avic_vcpu_blocking() ignores IRQ blocking Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 19/59] iommu/amd: KVM: SVM: Use pi_desc_addr to derive ga_root_ptr Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 20/59] iommu/amd: KVM: SVM: Pass NULL @vcpu_info to indicate "not guest mode" Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 21/59] KVM: SVM: Stop walking list of routing table entries when updating IRTE Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 22/59] KVM: VMX: " Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 23/59] KVM: SVM: Extract SVM specific code out of get_pi_vcpu_info() Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 24/59] KVM: x86: Move IRQ routing/delivery APIs from x86.c => irq.c Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 25/59] KVM: x86: Nullify irqfd->producer after updating IRTEs Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 26/59] KVM: x86: Dedup AVIC vs. PI code for identifying target vCPU Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 27/59] KVM: x86: Move posted interrupt tracepoint to common code Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 28/59] KVM: SVM: Clean up return handling in avic_pi_update_irte() Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 29/59] iommu: KVM: Split "struct vcpu_data" into separate AMD vs. Intel structs Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 30/59] KVM: Don't WARN if updating IRQ bypass route fails Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 31/59] KVM: Fold kvm_arch_irqfd_route_changed() into kvm_arch_update_irqfd_routing() Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 32/59] KVM: x86: Track irq_bypass_vcpu in common x86 code Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 33/59] KVM: x86: Skip IOMMU IRTE updates if there's no old or new vCPU being targeted Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 34/59] KVM: x86: Don't update IRTE entries when old and new routes were !MSI Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 35/59] KVM: SVM: Revert IRTE to legacy mode if IOMMU doesn't provide IR metadata Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 36/59] KVM: SVM: Take and hold ir_list_lock across IRTE updates in IOMMU Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 37/59] iommu/amd: Document which IRTE fields amd_iommu_update_ga() can modify Sean Christopherson
2025-05-23  0:59 ` Sean Christopherson [this message]
2025-05-30 10:13   ` [PATCH v2 38/59] iommu/amd: KVM: SVM: Infer IsRun from validity of pCPU destination Sairaj Kodilkar
2025-06-02 21:59     ` Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 39/59] iommu/amd: Factor out helper for manipulating IRTE GA/CPU info Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 40/59] iommu/amd: KVM: SVM: Set pCPU info in IRTE when setting vCPU affinity Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 41/59] iommu/amd: KVM: SVM: Add IRTE metadata to affined vCPU's list if AVIC is inhibited Sean Christopherson
2025-05-30 10:06   ` Sairaj Kodilkar
2025-06-02 22:26     ` Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 42/59] KVM: SVM: Don't check for assigned device(s) when updating affinity Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 43/59] KVM: SVM: Don't check for assigned device(s) when activating AVIC Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 44/59] KVM: SVM: WARN if (de)activating guest mode in IOMMU fails Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 45/59] KVM: SVM: Process all IRTEs on affinity change even if one update fails Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 46/59] KVM: SVM: WARN if updating IRTE GA fields in IOMMU fails Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 47/59] KVM: x86: Drop superfluous "has assigned device" check in kvm_pi_update_irte() Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 48/59] KVM: x86: WARN if IRQ bypass isn't supported " Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 49/59] KVM: x86: WARN if IRQ bypass routing is updated without in-kernel local APIC Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 50/59] KVM: SVM: WARN if ir_list is non-empty at vCPU free Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 51/59] KVM: x86: Decouple device assignment from IRQ bypass Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 52/59] KVM: VMX: WARN if VT-d Posted IRQs aren't possible when starting " Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 53/59] KVM: SVM: Use vcpu_idx, not vcpu_id, for GA log tag/metadata Sean Christopherson
2025-05-23  0:59 ` [PATCH v2 54/59] iommu/amd: WARN if KVM calls GA IRTE helpers without virtual APIC support Sean Christopherson
2025-05-23  1:00 ` [PATCH v2 55/59] KVM: SVM: Fold avic_set_pi_irte_mode() into its sole caller Sean Christopherson
2025-05-23  1:00 ` [PATCH v2 56/59] KVM: SVM: Don't check vCPU's blocking status when toggling AVIC on/off Sean Christopherson
2025-05-23  1:00 ` [PATCH v2 57/59] KVM: SVM: Consolidate IRTE update " Sean Christopherson
2025-05-23  1:00 ` [PATCH v2 58/59] iommu/amd: KVM: SVM: Allow KVM to control need for GA log interrupts Sean Christopherson
2025-05-23  1:00 ` [PATCH v2 59/59] KVM: SVM: Generate GA log IRQs only if the associated vCPUs is blocking Sean Christopherson
2025-06-04 17:11 ` [PATCH v2 00/59] KVM: iommu: Overhaul device posted IRQs support Paolo Bonzini
2025-06-09 12:20 ` Sairaj Kodilkar
2025-06-09 14:34   ` [PATCH " Sean Christopherson
2025-06-12 11:03     ` Sairaj Kodilkar

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