From: Sean Christopherson <seanjc@google.com>
To: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
Lu Baolu <baolu.lu@linux.intel.com>
Cc: kvm@vger.kernel.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, Sairaj Kodilkar <sarunkod@amd.com>,
Vasant Hegde <vasant.hegde@amd.com>,
Maxim Levitsky <mlevitsk@redhat.com>,
Joao Martins <joao.m.martins@oracle.com>,
Francesco Lavra <francescolavra.fl@gmail.com>,
David Matlack <dmatlack@google.com>
Subject: [PATCH v2 40/59] iommu/amd: KVM: SVM: Set pCPU info in IRTE when setting vCPU affinity
Date: Thu, 22 May 2025 17:59:45 -0700 [thread overview]
Message-ID: <20250523010004.3240643-41-seanjc@google.com> (raw)
In-Reply-To: <20250523010004.3240643-1-seanjc@google.com>
Now that setting vCPU affinity is guarded with ir_list_lock, i.e. now that
avic_physical_id_entry can be safely accessed, set the pCPU info
straight-away when setting vCPU affinity. Putting the IRTE into posted
mode, and then immediately updating the IRTE a second time if the target
vCPU is running is wasteful and confusing.
This also fixes a flaw where a posted IRQ that arrives between putting
the IRTE into guest_mode and setting the correct destination could cause
the IOMMU to ring the doorbell on the wrong pCPU.
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
arch/x86/include/asm/irq_remapping.h | 1 +
arch/x86/kvm/svm/avic.c | 26 ++++++++++++++------------
drivers/iommu/amd/iommu.c | 6 ++++--
include/linux/amd-iommu.h | 4 ++--
4 files changed, 21 insertions(+), 16 deletions(-)
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 2dbc9cb61c2f..4c75a17632f6 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -35,6 +35,7 @@ struct amd_iommu_pi_data {
u64 vapic_addr; /* Physical address of the vCPU's vAPIC. */
u32 ga_tag;
u32 vector; /* Guest vector of the interrupt */
+ int cpu;
bool is_guest_mode;
void *ir_data;
};
diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index c79648d96752..16557328aa58 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -726,6 +726,7 @@ void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu)
static int avic_set_pi_irte_mode(struct kvm_vcpu *vcpu, bool activate)
{
+ int apic_id = kvm_cpu_get_apicid(vcpu->cpu);
int ret = 0;
unsigned long flags;
struct vcpu_svm *svm = to_svm(vcpu);
@@ -745,7 +746,7 @@ static int avic_set_pi_irte_mode(struct kvm_vcpu *vcpu, bool activate)
list_for_each_entry(irqfd, &svm->ir_list, vcpu_list) {
if (activate)
- ret = amd_iommu_activate_guest_mode(irqfd->irq_bypass_data);
+ ret = amd_iommu_activate_guest_mode(irqfd->irq_bypass_data, apic_id);
else
ret = amd_iommu_deactivate_guest_mode(irqfd->irq_bypass_data);
if (ret)
@@ -809,6 +810,18 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
*/
guard(spinlock_irqsave)(&svm->ir_list_lock);
+ /*
+ * Update the target pCPU for IOMMU doorbells if the vCPU is
+ * running. If the vCPU is NOT running, i.e. is blocking or
+ * scheduled out, KVM will update the pCPU info when the vCPU
+ * is awakened and/or scheduled in. See also avic_vcpu_load().
+ */
+ entry = svm->avic_physical_id_entry;
+ if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)
+ pi_data.cpu = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
+ else
+ pi_data.cpu = -1;
+
ret = irq_set_vcpu_affinity(host_irq, &pi_data);
if (ret)
return ret;
@@ -823,17 +836,6 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
return -EIO;
}
- /*
- * Update the target pCPU for IOMMU doorbells if the vCPU is
- * running. If the vCPU is NOT running, i.e. is blocking or
- * scheduled out, KVM will update the pCPU info when the vCPU
- * is awakened and/or scheduled in. See also avic_vcpu_load().
- */
- entry = svm->avic_physical_id_entry;
- if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)
- amd_iommu_update_ga(entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK,
- pi_data.ir_data);
-
irqfd->irq_bypass_data = pi_data.ir_data;
list_add(&irqfd->vcpu_list, &svm->ir_list);
return 0;
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 15718b7b8bd4..718bd9604f71 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3850,7 +3850,7 @@ int amd_iommu_update_ga(int cpu, void *data)
}
EXPORT_SYMBOL(amd_iommu_update_ga);
-int amd_iommu_activate_guest_mode(void *data)
+int amd_iommu_activate_guest_mode(void *data, int cpu)
{
struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -3871,6 +3871,8 @@ int amd_iommu_activate_guest_mode(void *data)
entry->hi.fields.vector = ir_data->ga_vector;
entry->lo.fields_vapic.ga_tag = ir_data->ga_tag;
+ __amd_iommu_update_ga(entry, cpu);
+
return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry);
}
@@ -3937,7 +3939,7 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info)
ir_data->ga_root_ptr = (pi_data->vapic_addr >> 12);
ir_data->ga_vector = pi_data->vector;
ir_data->ga_tag = pi_data->ga_tag;
- ret = amd_iommu_activate_guest_mode(ir_data);
+ ret = amd_iommu_activate_guest_mode(ir_data, pi_data->cpu);
} else {
ret = amd_iommu_deactivate_guest_mode(ir_data);
}
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index fe0e16ffe0e5..c9f2df0c4596 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -32,7 +32,7 @@ extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
extern int amd_iommu_update_ga(int cpu, void *data);
-extern int amd_iommu_activate_guest_mode(void *data);
+extern int amd_iommu_activate_guest_mode(void *data, int cpu);
extern int amd_iommu_deactivate_guest_mode(void *data);
#else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
@@ -48,7 +48,7 @@ static inline int amd_iommu_update_ga(int cpu, void *data)
return 0;
}
-static inline int amd_iommu_activate_guest_mode(void *data)
+static inline int amd_iommu_activate_guest_mode(void *data, int cpu)
{
return 0;
}
--
2.49.0.1151.ga128411c76-goog
next prev parent reply other threads:[~2025-05-23 1:01 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-23 0:59 [PATCH v2 00/59] KVM: iommu: Overhaul device posted IRQs support Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 01/59] KVM: x86: Pass new routing entries and irqfd when updating IRTEs Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 02/59] KVM: SVM: Track per-vCPU IRTEs using kvm_kernel_irqfd structure Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 03/59] KVM: SVM: Delete IRTE link from previous vCPU before setting new IRTE Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 04/59] iommu/amd: KVM: SVM: Delete now-unused cached/previous GA tag fields Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 05/59] KVM: SVM: Delete IRTE link from previous vCPU irrespective of new routing Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 06/59] KVM: SVM: Drop pointless masking of default APIC base when setting V_APIC_BAR Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 07/59] KVM: SVM: Drop pointless masking of kernel page pa's with AVIC HPA masks Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 08/59] KVM: SVM: Add helper to deduplicate code for getting AVIC backing page Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 09/59] KVM: SVM: Drop vcpu_svm's pointless avic_backing_page field Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 10/59] KVM: SVM: Inhibit AVIC if ID is too big instead of rejecting vCPU creation Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 11/59] KVM: SVM: Drop redundant check in AVIC code on ID during " Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 12/59] KVM: SVM: Track AVIC tables as natively sized pointers, not "struct pages" Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 13/59] KVM: SVM: Drop superfluous "cache" of AVIC Physical ID entry pointer Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 14/59] KVM: VMX: Move enable_ipiv knob to common x86 Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 15/59] KVM: SVM: Add enable_ipiv param, never set IsRunning if disabled Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 16/59] KVM: SVM: Disable (x2)AVIC IPI virtualization if CPU has erratum #1235 Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 17/59] KVM: VMX: Suppress PI notifications whenever the vCPU is put Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 18/59] KVM: SVM: Add a comment to explain why avic_vcpu_blocking() ignores IRQ blocking Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 19/59] iommu/amd: KVM: SVM: Use pi_desc_addr to derive ga_root_ptr Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 20/59] iommu/amd: KVM: SVM: Pass NULL @vcpu_info to indicate "not guest mode" Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 21/59] KVM: SVM: Stop walking list of routing table entries when updating IRTE Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 22/59] KVM: VMX: " Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 23/59] KVM: SVM: Extract SVM specific code out of get_pi_vcpu_info() Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 24/59] KVM: x86: Move IRQ routing/delivery APIs from x86.c => irq.c Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 25/59] KVM: x86: Nullify irqfd->producer after updating IRTEs Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 26/59] KVM: x86: Dedup AVIC vs. PI code for identifying target vCPU Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 27/59] KVM: x86: Move posted interrupt tracepoint to common code Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 28/59] KVM: SVM: Clean up return handling in avic_pi_update_irte() Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 29/59] iommu: KVM: Split "struct vcpu_data" into separate AMD vs. Intel structs Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 30/59] KVM: Don't WARN if updating IRQ bypass route fails Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 31/59] KVM: Fold kvm_arch_irqfd_route_changed() into kvm_arch_update_irqfd_routing() Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 32/59] KVM: x86: Track irq_bypass_vcpu in common x86 code Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 33/59] KVM: x86: Skip IOMMU IRTE updates if there's no old or new vCPU being targeted Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 34/59] KVM: x86: Don't update IRTE entries when old and new routes were !MSI Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 35/59] KVM: SVM: Revert IRTE to legacy mode if IOMMU doesn't provide IR metadata Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 36/59] KVM: SVM: Take and hold ir_list_lock across IRTE updates in IOMMU Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 37/59] iommu/amd: Document which IRTE fields amd_iommu_update_ga() can modify Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 38/59] iommu/amd: KVM: SVM: Infer IsRun from validity of pCPU destination Sean Christopherson
2025-05-30 10:13 ` Sairaj Kodilkar
2025-06-02 21:59 ` Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 39/59] iommu/amd: Factor out helper for manipulating IRTE GA/CPU info Sean Christopherson
2025-05-23 0:59 ` Sean Christopherson [this message]
2025-05-23 0:59 ` [PATCH v2 41/59] iommu/amd: KVM: SVM: Add IRTE metadata to affined vCPU's list if AVIC is inhibited Sean Christopherson
2025-05-30 10:06 ` Sairaj Kodilkar
2025-06-02 22:26 ` Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 42/59] KVM: SVM: Don't check for assigned device(s) when updating affinity Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 43/59] KVM: SVM: Don't check for assigned device(s) when activating AVIC Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 44/59] KVM: SVM: WARN if (de)activating guest mode in IOMMU fails Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 45/59] KVM: SVM: Process all IRTEs on affinity change even if one update fails Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 46/59] KVM: SVM: WARN if updating IRTE GA fields in IOMMU fails Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 47/59] KVM: x86: Drop superfluous "has assigned device" check in kvm_pi_update_irte() Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 48/59] KVM: x86: WARN if IRQ bypass isn't supported " Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 49/59] KVM: x86: WARN if IRQ bypass routing is updated without in-kernel local APIC Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 50/59] KVM: SVM: WARN if ir_list is non-empty at vCPU free Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 51/59] KVM: x86: Decouple device assignment from IRQ bypass Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 52/59] KVM: VMX: WARN if VT-d Posted IRQs aren't possible when starting " Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 53/59] KVM: SVM: Use vcpu_idx, not vcpu_id, for GA log tag/metadata Sean Christopherson
2025-05-23 0:59 ` [PATCH v2 54/59] iommu/amd: WARN if KVM calls GA IRTE helpers without virtual APIC support Sean Christopherson
2025-05-23 1:00 ` [PATCH v2 55/59] KVM: SVM: Fold avic_set_pi_irte_mode() into its sole caller Sean Christopherson
2025-05-23 1:00 ` [PATCH v2 56/59] KVM: SVM: Don't check vCPU's blocking status when toggling AVIC on/off Sean Christopherson
2025-05-23 1:00 ` [PATCH v2 57/59] KVM: SVM: Consolidate IRTE update " Sean Christopherson
2025-05-23 1:00 ` [PATCH v2 58/59] iommu/amd: KVM: SVM: Allow KVM to control need for GA log interrupts Sean Christopherson
2025-05-23 1:00 ` [PATCH v2 59/59] KVM: SVM: Generate GA log IRQs only if the associated vCPUs is blocking Sean Christopherson
2025-06-04 17:11 ` [PATCH v2 00/59] KVM: iommu: Overhaul device posted IRQs support Paolo Bonzini
2025-06-09 12:20 ` Sairaj Kodilkar
2025-06-09 14:34 ` [PATCH " Sean Christopherson
2025-06-12 11:03 ` Sairaj Kodilkar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250523010004.3240643-41-seanjc@google.com \
--to=seanjc@google.com \
--cc=baolu.lu@linux.intel.com \
--cc=dmatlack@google.com \
--cc=dwmw2@infradead.org \
--cc=francescolavra.fl@gmail.com \
--cc=iommu@lists.linux.dev \
--cc=joao.m.martins@oracle.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mlevitsk@redhat.com \
--cc=pbonzini@redhat.com \
--cc=sarunkod@amd.com \
--cc=vasant.hegde@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox