Linux IOMMU Development
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From: Jason Gunthorpe <jgg@ziepe.ca>
To: Shyam Saini <shyamsaini@linux.microsoft.com>
Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, virtualization@lists.linux.dev,
	will@kernel.org, jacob.pan@linux.microsoft.com,
	eric.auger@redhat.com, code@tyhicks.com,
	eahariha@linux.microsoft.com, vijayb@linux.microsoft.com,
	bboscaccy@linux.microsoft.com, robh@kernel.org,
	saravanak@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
	lizhi.hou@amd.com, clement.leger@bootlin.com
Subject: Re: [PATCH v3 2/3] iommu/of: fix device tree configuration for PCI devices
Date: Mon, 18 Aug 2025 12:53:10 -0300	[thread overview]
Message-ID: <20250818155310.GG599331@ziepe.ca> (raw)
In-Reply-To: <20250815023236.GA30997@linuxonhyperv3.guj3yctzbm1etfxqx2vob5hsef.xx.internal.cloudapp.net>

On Thu, Aug 14, 2025 at 07:32:36PM -0700, Shyam Saini wrote:
> On Thu, Aug 14, 2025 at 09:39:58PM -0300, Jason Gunthorpe wrote:
> > On Thu, Aug 14, 2025 at 04:30:18PM -0700, Shyam Saini wrote:
> > > or were you referring to [2]?
> > > 
> > > In that case, the PCI child node data needs to be parsed, which is
> > > currently handled individually by each host controller driver.
> > 
> > Yes, this looks like it may be what I was thinking of, the pci@1,0
> > specifes the BDF effectively
> 
> In that case, we'll need to parse the child DTS nodes properly
> within of_iommu_get_resv_regions(). I'll include this in v4.

Kinda surprised this isn't happening already? It would be good to
refer to the original specs and describe how whatetever you propose is
aligned there.

> > Presumably this is a fixed issue of the platform. You never did
> > explain how your system has such werdio behavior, or how something
> > like iommu=pt can function on it...
> Yes, this issue is platform-specific. On this platform, the default MSI IOVA
> range overlaps with an address region that is reserved for another purpose,
> Other than that we haven't observed any obvious issues for DMA operations

Usually DRAM is at the default MSI IOVA address, so if you run
iommu=pt then presumably your DRAM map has a nice hole in it.. But
maybe the memory map told the OS about that.

Jason

  reply	other threads:[~2025-08-18 15:53 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-06 21:55 [PATCH v3 0/3] arm-smmu: select suitable MSI IOVA Shyam Saini
2025-08-06 21:55 ` [PATCH v3 1/3] arm-smmu: move MSI_IOVA macro definitions Shyam Saini
2025-08-07 14:32   ` kernel test robot
2025-08-06 21:55 ` [PATCH v3 2/3] iommu/of: fix device tree configuration for PCI devices Shyam Saini
2025-08-08 12:15   ` Jason Gunthorpe
2025-08-14 23:30     ` Shyam Saini
2025-08-15  0:39       ` Jason Gunthorpe
2025-08-15  2:32         ` Shyam Saini
2025-08-18 15:53           ` Jason Gunthorpe [this message]
2025-08-26  1:15             ` Shyam Saini
2025-08-26 12:36               ` Jason Gunthorpe
2025-08-26 22:19                 ` Shyam Saini
2025-08-06 21:55 ` [PATCH v3 3/3] arm-smmu: select suitable MSI IOVA Shyam Saini
2025-08-06 23:58   ` Jason Gunthorpe
2025-08-07 17:55   ` kernel test robot
2025-08-11 22:34   ` Jacob Pan

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