From: Jason Gunthorpe <jgg@nvidia.com>
To: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
linux-arm-kernel@lists.infradead.org,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>,
Michael Shavit <mshavit@google.com>,
Nicolin Chen <nicolinc@nvidia.com>
Subject: [PATCH 03/27] iommu/arm-smmu-v3: Do not ATC invalidate the entire domain
Date: Wed, 11 Oct 2023 20:25:39 -0300 [thread overview]
Message-ID: <3-v1-afbb86647bbd+5-smmuv3_newapi_p2_jgg@nvidia.com> (raw)
In-Reply-To: <0-v1-afbb86647bbd+5-smmuv3_newapi_p2_jgg@nvidia.com>
At this point we know which master we are going to change the PCI config
on, this is the only device we need to invalidate. Switch
arm_smmu_atc_inv_domain() for arm_smmu_atc_inv_master().
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index b527e635a3043c..ad29f1ab5185aa 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -2391,7 +2391,10 @@ static void arm_smmu_enable_ats(struct arm_smmu_master *master,
pdev = to_pci_dev(master->dev);
atomic_inc(&smmu_domain->nr_ats_masters);
- arm_smmu_atc_inv_domain(smmu_domain, IOMMU_NO_PASID, 0, 0);
+ /*
+ * ATC invalidation of PASID 0 causes the entire ATC to be flushed.
+ */
+ arm_smmu_atc_inv_master(master);
if (pci_enable_ats(pdev, stu))
dev_err(master->dev, "Failed to enable ATS (STU %zu)\n", stu);
}
--
2.42.0
next prev parent reply other threads:[~2023-10-11 23:26 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-11 23:25 [PATCH 00/27] Update SMMUv3 to the modern iommu API (part 2/2) Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 01/27] iommu/arm-smmu-v3: Check that the RID domain is S1 in SVA Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 02/27] iommu/arm-smmu-v3: Do not allow a SVA domain to be set on the wrong PASID Jason Gunthorpe
2023-10-11 23:25 ` Jason Gunthorpe [this message]
2023-10-11 23:25 ` [PATCH 04/27] iommu/arm-smmu-v3: Add a type for the CD entry Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 05/27] iommu/arm-smmu-v3: Make CD programming use arm_smmu_write_entry_step() Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 06/27] iommu/arm-smmu-v3: Consolidate clearing a CD table entry Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 07/27] iommu/arm-smmu-v3: Move the CD generation for S1 domains into a function Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 08/27] iommu/arm-smmu-v3: Move allocation of the cdtable into arm_smmu_get_cd_ptr() Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 09/27] iommu/arm-smmu-v3: Allocate the CD table entry in advance Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 10/27] iommu/arm-smmu-v3: Move the CD generation for SVA into a function Jason Gunthorpe
2023-10-24 4:12 ` Michael Shavit
2023-10-24 11:52 ` Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 11/27] iommu/arm-smmu-v3: Lift CD programming out of the SVA notifier code Jason Gunthorpe
2023-10-24 6:34 ` Michael Shavit
2023-10-24 23:46 ` Jason Gunthorpe
2023-10-26 7:31 ` Michael Shavit
2023-10-26 14:11 ` Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 12/27] iommu/arm-smmu-v3: Build the whole CD in arm_smmu_make_s1_cd() Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 13/27] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 14/27] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2023-10-24 8:09 ` Michael Shavit
2023-10-24 23:56 ` Jason Gunthorpe
2023-10-26 7:00 ` Michael Shavit
2023-10-26 14:38 ` Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 15/27] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 16/27] iommu/arm-smmu-v3: Keep track of valid CD entries in the cd_table Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 17/27] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2023-10-25 14:01 ` Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 18/27] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2023-10-24 8:58 ` Michael Shavit
2023-10-24 13:05 ` Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 19/27] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 20/27] iommu: Add ops->domain_alloc_sva() Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 21/27] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2023-10-25 13:56 ` Jason Gunthorpe
2023-10-25 16:23 ` Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 22/27] iommu/arm-smmu-v3: Consolidate freeing the ASID/VMID Jason Gunthorpe
2023-10-11 23:25 ` [PATCH 23/27] iommu/arm-smmu-v3: Move the arm_smmu_asid_xa to per-smmu like vmid Jason Gunthorpe
2023-10-11 23:26 ` [PATCH 24/27] iommu/arm-smmu-v3: Bring back SVA BTM support Jason Gunthorpe
2023-10-11 23:26 ` [PATCH 25/27] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2023-10-25 15:10 ` Jason Gunthorpe
2023-10-11 23:26 ` [PATCH 26/27] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2023-10-11 23:26 ` [PATCH 27/27] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
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