From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org, suravee.suthikulpanit@amd.com
Subject: Re: [PATCH 00/21] iommu/amd: Preparation for SVA Support (Part 1 of 2)
Date: Fri, 14 Jul 2023 14:53:55 -0300 [thread overview]
Message-ID: <ZLGLs8B+07fU0Scc@ziepe.ca> (raw)
In-Reply-To: <20230712141516.154144-1-vasant.hegde@amd.com>
On Wed, Jul 12, 2023 at 02:14:55PM +0000, Vasant Hegde wrote:
> This is part 1 of the 2-part series to introduce Share Virtual Address
> (SVA) support, which focuses on cleaning up and refactoring the existing
> code in preparation for subsequent series.
>
> It contains the following enhancements:
>
> * Patch 1 - 7:
> Clean up and refactoring. No functional changes.
>
> * Patch 8 - 11:
> Miscellaneous improvements.
>
> * Patch 12 - 15:
> Introduce new set of AMD IOMMU protection domain flags, which simplifies
> domain manangements.
>
> * Patch 16 - 21:
> Modify logic to independently enable PCI capabilities (ATS/PASID/PRI)
> for devices. This allows more flexibility in preparation for SVA and
> IOPF supports.
I don't know alot about the AMD driver, but these all seemed like a
pretty good movement in the right direction.
I hope part 2 removes all EXPORT_SYMBOL's from the AMD driver :)
Jason
prev parent reply other threads:[~2023-07-14 17:53 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 14:14 [PATCH 00/21] iommu/amd: Preparation for SVA Support (Part 1 of 2) Vasant Hegde
2023-07-12 14:14 ` [PATCH 01/21] iommu/amd: Remove unused amd_io_pgtable.pt_root variable Vasant Hegde
2023-07-12 14:14 ` [PATCH 02/21] iommu/amd: Consolidate timeout pre-define to amd_iommu_type.h Vasant Hegde
2023-07-12 14:14 ` [PATCH 03/21] iommu/amd: Consolidate logic to allocate protection domain Vasant Hegde
2023-07-12 14:14 ` [PATCH 04/21] iommu/amd: Refactor protection domain allocation code Vasant Hegde
2023-07-12 14:15 ` [PATCH 05/21] iommu/amd/iommu_v2: Use protection_domain in struct device_state Vasant Hegde
2023-07-12 14:15 ` [PATCH 06/21] iommu/amd: Introduce helper functions for managing GCR3 table Vasant Hegde
2023-07-12 14:15 ` [PATCH 07/21] iommu/amd: Use struct protection_domain in helper functions Vasant Hegde
2023-07-14 16:57 ` Jason Gunthorpe
2023-07-12 14:15 ` [PATCH 08/21] iommu/amd: Do not set amd_iommu_pgtable in pass-through mode Vasant Hegde
2023-07-12 14:15 ` [PATCH 09/21] iommu/amd: Miscellaneous clean up when free domain Vasant Hegde
2023-07-12 14:15 ` [PATCH 10/21] iommu/amd: Modify logic for checking GT and PPR features Vasant Hegde
2023-07-12 14:15 ` [PATCH 11/21] iommu/amd: Clean up and enhance protection domain flags Vasant Hegde
2023-07-14 17:25 ` Jason Gunthorpe
2023-07-17 1:22 ` Suthikulpanit, Suravee
2023-07-17 12:23 ` Jason Gunthorpe
2023-07-18 6:38 ` Suthikulpanit, Suravee
2023-07-18 12:36 ` Jason Gunthorpe
2023-07-28 5:43 ` Vasant Hegde
2023-07-12 14:15 ` [PATCH 12/21] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2023-07-12 14:15 ` [PATCH 13/21] iommu/amd: Consolidate logic for setting up v2 API mode Vasant Hegde
2023-07-12 14:15 ` [PATCH 14/21] iommu/amd: Refactor domain allocation code for v2DMA mode Vasant Hegde
2023-07-12 14:15 ` [PATCH 15/21] iommu/amd: Setup v2 domain with max pasids Vasant Hegde
2023-07-12 14:15 ` [PATCH 16/21] iommu/amd: Introduce iommu_dev_data.flags to track device capabilities Vasant Hegde
2023-07-12 14:15 ` [PATCH 17/21] iommu/amd: Rename ats related variables Vasant Hegde
2023-07-12 14:15 ` [PATCH 18/21] iommu/amd: Enable device ATS/PASID/PRI capabilities independently Vasant Hegde
2023-07-12 14:15 ` [PATCH 19/21] iommu/amd: Delay enabling PRI to after initializing domain Vasant Hegde
2023-07-12 14:15 ` [PATCH 20/21] iommu/amd: Initialize iommu_device->max_pasids Vasant Hegde
2023-07-12 14:15 ` [PATCH 21/21] iommu/amd: Simplify amd_iommu_device_info() Vasant Hegde
2023-07-14 17:53 ` Jason Gunthorpe [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZLGLs8B+07fU0Scc@ziepe.ca \
--to=jgg@ziepe.ca \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=suravee.suthikulpanit@amd.com \
--cc=vasant.hegde@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox