Linux IOMMU Development
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From: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: "iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"kevin.tian@intel.com" <kevin.tian@intel.com>,
	"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
	"mshavit@google.com" <mshavit@google.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	jiangkunkun <jiangkunkun@huawei.com>,
	zhukeqian <zhukeqian1@huawei.com>, Linuxarm <linuxarm@huawei.com>
Subject: RE: [PATCH 2/5] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping
Date: Thu, 30 Nov 2023 09:17:16 +0000	[thread overview]
Message-ID: <aec2cd5ae55944f8ab978b3365281883@huawei.com> (raw)
In-Reply-To: <20231129193050.GA436702@nvidia.com>



> -----Original Message-----
> From: Jason Gunthorpe <jgg@nvidia.com>
> Sent: Wednesday, November 29, 2023 7:31 PM
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
> Cc: iommu@lists.linux.dev; linux-arm-kernel@lists.infradead.org;
> robin.murphy@arm.com; will@kernel.org; joro@8bytes.org;
> kevin.tian@intel.com; nicolinc@nvidia.com; mshavit@google.com;
> eric.auger@redhat.com; joao.m.martins@oracle.com; jiangkunkun
> <jiangkunkun@huawei.com>; zhukeqian <zhukeqian1@huawei.com>; Linuxarm
> <linuxarm@huawei.com>
> Subject: Re: [PATCH 2/5] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-
> pgtable mapping
> 
> On Tue, Nov 28, 2023 at 09:49:37AM +0000, Shameer Kolothum wrote:
> 
> >  /* IOMMU API */
> >  static bool arm_smmu_capable(struct device *dev, enum iommu_cap cap)
> >  {
> > @@ -2401,6 +2413,10 @@ static int arm_smmu_domain_finalise(struct
> arm_smmu_domain *smmu_domain,
> >  		.iommu_dev	= smmu->dev,
> >  	};
> >
> > +	if (arm_smmu_dbm_capable(smmu) &&
> > +	    smmu_domain->stage == ARM_SMMU_DOMAIN_S1)
> > +		pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_ARM_HD;
> > +
> 
> This flow has become a bit wonky, the switch statement right above is
> already checking S1 and partially initializing pgtbl_cfg.
> 
> I suggest moving the pgtbl_cfg init to above the switch and making the
> switch store directly into pgtbl_cfg values and remove the stack ios
> and oas values
> 

Got it. Will do.

Thanks,
Shameer

  reply	other threads:[~2023-11-30  9:36 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-28  9:49 [PATCH 0/5] iommu/smmuv3: Add IOMMUFD dirty tracking support for SMMUv3 Shameer Kolothum
2023-11-28  9:49 ` [PATCH 1/5] iommu/arm-smmu-v3: Add feature detection for HTTU Shameer Kolothum
2023-11-29 19:49   ` Jason Gunthorpe
2023-11-28  9:49 ` [PATCH 2/5] iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping Shameer Kolothum
2023-11-29 19:30   ` Jason Gunthorpe
2023-11-30  9:17     ` Shameerali Kolothum Thodi [this message]
2023-11-28  9:49 ` [PATCH 3/5] iommu/arm-smmu-v3: Add read_and_clear_dirty() support Shameer Kolothum
2023-11-29 19:35   ` Jason Gunthorpe
2023-11-30  9:05     ` Shameerali Kolothum Thodi
2023-11-28  9:49 ` [PATCH 4/5] iommu/arm-smmu-v3: Add set_dirty_tracking() support Shameer Kolothum
2023-11-29 19:42   ` Jason Gunthorpe
2023-11-30  8:56     ` Shameerali Kolothum Thodi
2023-11-30 12:54       ` Jason Gunthorpe
2023-11-30 14:04         ` Shameerali Kolothum Thodi
2023-12-14 16:23         ` Joao Martins
2023-11-28  9:49 ` [PATCH 5/5] iommu/arm-smmu-v3: Enforce dirty tracking in domain attach/alloc Shameer Kolothum
2023-11-29 19:48   ` Jason Gunthorpe
2023-11-30  9:01     ` Shameerali Kolothum Thodi
2023-12-14 16:29   ` Joao Martins

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