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From: Baolu Lu <baolu.lu@linux.intel.com>
To: Dmytro Maluka <dmaluka@chromium.org>, iommu@lists.linux.dev
Cc: David Woodhouse <dwmw2@infradead.org>,
	"Vineeth Pillai (Google)" <vineeth@bitbyteword.org>,
	Aashish Sharma <aashish@aashishsharma.net>,
	Grzegorz Jaszczyk <jaszczyk@chromium.org>,
	Chuanxiao Dong <chuanxiao.dong@intel.com>,
	Kevin Tian <kevin.tian@intel.com>
Subject: Re: [Intel IOMMU] Question about memory ordering in context/PASID entry updates
Date: Fri, 5 Dec 2025 13:32:51 +0800	[thread overview]
Message-ID: <b9c23895-ae8f-4c71-a0b4-5956e2719901@linux.intel.com> (raw)
In-Reply-To: <aTG7gc7I5wExai3S@google.com>

On 12/5/25 00:49, Dmytro Maluka wrote:
> When updating a context or PASID entry, we'd better make sure we set the
> present bit after setting up other bits, not before, right? And indeed,

Yes, you are right.

> for example, in domain_context_mapping_one() we are doing it in the
> following order:
> 
> 	context_clear_entry(context);
> 	<set other bits>
> 	context_set_present(context);
> 
> But it doesn't look like we have any compiler barriers to actually
> ensure this order? (And in case of context entries, there is even no
> WRITE_ONCE or anything like that.)

Yes, we should do that to ensure the order.

> So, are we just hoping that the compiler will not reorder it?
> 
> What am I missing?

We didn't implement that primarily because we hadn't encountered any
real issues, operating under the assumption that the root/context
entries population is completed before DMA translation is really
enabled.

However, that assumption is incorrect, as users can change a device's
default domain in VT-d legacy mode. This action triggers a context entry
change while DMA translation is already running. So, yes, this is a bug.

Thanks,
baolu

  reply	other threads:[~2025-12-05  5:37 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-04 16:49 [Intel IOMMU] Question about memory ordering in context/PASID entry updates Dmytro Maluka
2025-12-05  5:32 ` Baolu Lu [this message]
2025-12-05 14:09   ` Dmytro Maluka
2025-12-07  3:35     ` Baolu Lu

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