* [PATCH 1/2] fixing typo in macro name
@ 2025-05-17 3:06 Jihed Chaibi
2025-05-17 3:51 ` Ozgur Kara
2025-05-19 14:57 ` Alex Deucher
0 siblings, 2 replies; 3+ messages in thread
From: Jihed Chaibi @ 2025-05-17 3:06 UTC (permalink / raw)
To: harry.wentland, sunpeng.li, siqueira
Cc: amd-gfx, dri-devel, linux-kernel, skhan, linux-kernel-mentees,
jihed.chaibi.dev
"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS
PS: checkpatch.pl is complaining about the presence of a space at the
start of drivers/gpu/drm/amd/include/atomfirmware.h line: 1716
This is propably because this file uses (two) spaces and not tabs.
Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com>
---
drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h | 2 +-
drivers/gpu/drm/amd/include/atombios.h | 4 ++--
drivers/gpu/drm/amd/include/atomfirmware.h | 2 +-
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c | 2 +-
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
index 813463ffe..cc4670316 100644
--- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
+++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
@@ -424,7 +424,7 @@ struct integrated_info {
/*
* DFS-bypass flag
*/
-/* Copy of SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS from atombios.h */
+/* Copy of SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS from atombios.h */
enum {
DFS_BYPASS_ENABLE = 0x10
};
diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
index b78360a71..a99923b4e 100644
--- a/drivers/gpu/drm/amd/include/atombios.h
+++ b/drivers/gpu/drm/amd/include/atombios.h
@@ -6017,7 +6017,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
#define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE 0x01
#define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE 0x02
#define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT 0x08
-#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS 0x10
+#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS 0x10
//ulGPUCapInfo[16]=1 indicate SMC firmware is able to support GNB fast resume function, so that driver can call SMC to program most of GNB register during resuming, from ML
#define SYS_INFO_GPUCAPS__GNB_FAST_RESUME_CAPABLE 0x00010000
@@ -6460,7 +6460,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_9
// ulGPUCapInfo
#define SYS_INFO_V1_9_GPUCAPSINFO_DISABLE_AUX_MODE_DETECT 0x08
-#define SYS_INFO_V1_9_GPUCAPSINFO_ENABEL_DFS_BYPASS 0x10
+#define SYS_INFO_V1_9_GPUCAPSINFO_ENABLE_DFS_BYPASS 0x10
//ulGPUCapInfo[16]=1 indicate SMC firmware is able to support GNB fast resume function, so that driver can call SMC to program most of GNB register during resuming, from ML
#define SYS_INFO_V1_9_GPUCAPSINFO_GNB_FAST_RESUME_CAPABLE 0x00010000
//ulGPUCapInfo[18]=1 indicate the IOMMU is not available
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
index 0160d65f3..52eb3a474 100644
--- a/drivers/gpu/drm/amd/include/atomfirmware.h
+++ b/drivers/gpu/drm/amd/include/atomfirmware.h
@@ -1713,7 +1713,7 @@ enum atom_system_vbiosmisc_def{
// gpucapinfo
enum atom_system_gpucapinf_def{
- SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS = 0x10,
+ SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS = 0x10,
};
//dpphy_override
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
index 59fae668d..34e71727b 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
@@ -2594,7 +2594,7 @@ static int kv_parse_sys_info_table(struct amdgpu_device *adev)
le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
}
if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
- SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
+ SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
pi->caps_enable_dfs_bypass = true;
sumo_construct_sclk_voltage_mapping_table(adev,
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
index 9d3b33446..9b20076e2 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
@@ -394,7 +394,7 @@ static int smu8_get_system_info_data(struct pp_hwmgr *hwmgr)
}
if (le32_to_cpu(info->ulGPUCapInfo) &
- SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS) {
+ SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS) {
phm_cap_set(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_EnableDFSBypass);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] fixing typo in macro name
2025-05-17 3:06 [PATCH 1/2] fixing typo in macro name Jihed Chaibi
@ 2025-05-17 3:51 ` Ozgur Kara
2025-05-19 14:57 ` Alex Deucher
1 sibling, 0 replies; 3+ messages in thread
From: Ozgur Kara @ 2025-05-17 3:51 UTC (permalink / raw)
To: Jihed Chaibi
Cc: harry.wentland, sunpeng.li, siqueira, amd-gfx, dri-devel,
linux-kernel, skhan, linux-kernel-mentees
Jihed Chaibi <jihed.chaibi.dev@gmail.com>, 17 May 2025 Cmt, 06:06
tarihinde şunu yazdı:
>
> "ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS
>
> PS: checkpatch.pl is complaining about the presence of a space at the
> start of drivers/gpu/drm/amd/include/atomfirmware.h line: 1716
> This is propably because this file uses (two) spaces and not tabs.
>
Hello,
i stared at my screen for a long time to understand what the fix was
and finally figured it out but i think it also occurs in files
containing graphic objects.
it must have changed completely, there must be a macro that calls graph objects.
Regards
Ozgur
> Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com>
> ---
> drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h | 2 +-
> drivers/gpu/drm/amd/include/atombios.h | 4 ++--
> drivers/gpu/drm/amd/include/atomfirmware.h | 2 +-
> drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c | 2 +-
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c | 2 +-
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
> index 813463ffe..cc4670316 100644
> --- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
> +++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
> @@ -424,7 +424,7 @@ struct integrated_info {
> /*
> * DFS-bypass flag
> */
> -/* Copy of SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS from atombios.h */
> +/* Copy of SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS from atombios.h */
> enum {
> DFS_BYPASS_ENABLE = 0x10
> };
> diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
> index b78360a71..a99923b4e 100644
> --- a/drivers/gpu/drm/amd/include/atombios.h
> +++ b/drivers/gpu/drm/amd/include/atombios.h
> @@ -6017,7 +6017,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
> #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE 0x01
> #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE 0x02
> #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT 0x08
> -#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS 0x10
> +#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS 0x10
> //ulGPUCapInfo[16]=1 indicate SMC firmware is able to support GNB fast resume function, so that driver can call SMC to program most of GNB register during resuming, from ML
> #define SYS_INFO_GPUCAPS__GNB_FAST_RESUME_CAPABLE 0x00010000
>
> @@ -6460,7 +6460,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_9
>
> // ulGPUCapInfo
> #define SYS_INFO_V1_9_GPUCAPSINFO_DISABLE_AUX_MODE_DETECT 0x08
> -#define SYS_INFO_V1_9_GPUCAPSINFO_ENABEL_DFS_BYPASS 0x10
> +#define SYS_INFO_V1_9_GPUCAPSINFO_ENABLE_DFS_BYPASS 0x10
> //ulGPUCapInfo[16]=1 indicate SMC firmware is able to support GNB fast resume function, so that driver can call SMC to program most of GNB register during resuming, from ML
> #define SYS_INFO_V1_9_GPUCAPSINFO_GNB_FAST_RESUME_CAPABLE 0x00010000
> //ulGPUCapInfo[18]=1 indicate the IOMMU is not available
> diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
> index 0160d65f3..52eb3a474 100644
> --- a/drivers/gpu/drm/amd/include/atomfirmware.h
> +++ b/drivers/gpu/drm/amd/include/atomfirmware.h
> @@ -1713,7 +1713,7 @@ enum atom_system_vbiosmisc_def{
>
> // gpucapinfo
> enum atom_system_gpucapinf_def{
> - SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS = 0x10,
> + SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS = 0x10,
> };
>
> //dpphy_override
> diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
> index 59fae668d..34e71727b 100644
> --- a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
> @@ -2594,7 +2594,7 @@ static int kv_parse_sys_info_table(struct amdgpu_device *adev)
> le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
> }
> if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
> - SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
> + SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
> pi->caps_enable_dfs_bypass = true;
>
> sumo_construct_sclk_voltage_mapping_table(adev,
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
> index 9d3b33446..9b20076e2 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
> @@ -394,7 +394,7 @@ static int smu8_get_system_info_data(struct pp_hwmgr *hwmgr)
> }
>
> if (le32_to_cpu(info->ulGPUCapInfo) &
> - SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS) {
> + SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS) {
> phm_cap_set(hwmgr->platform_descriptor.platformCaps,
> PHM_PlatformCaps_EnableDFSBypass);
> }
> --
> 2.39.5
>
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] fixing typo in macro name
2025-05-17 3:06 [PATCH 1/2] fixing typo in macro name Jihed Chaibi
2025-05-17 3:51 ` Ozgur Kara
@ 2025-05-19 14:57 ` Alex Deucher
1 sibling, 0 replies; 3+ messages in thread
From: Alex Deucher @ 2025-05-19 14:57 UTC (permalink / raw)
To: Jihed Chaibi
Cc: harry.wentland, sunpeng.li, siqueira, amd-gfx, dri-devel,
linux-kernel, skhan, linux-kernel-mentees
Applied. Thanks!
On Sat, May 17, 2025 at 7:43 AM Jihed Chaibi <jihed.chaibi.dev@gmail.com> wrote:
>
> "ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS
>
> PS: checkpatch.pl is complaining about the presence of a space at the
> start of drivers/gpu/drm/amd/include/atomfirmware.h line: 1716
> This is propably because this file uses (two) spaces and not tabs.
>
> Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com>
> ---
> drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h | 2 +-
> drivers/gpu/drm/amd/include/atombios.h | 4 ++--
> drivers/gpu/drm/amd/include/atomfirmware.h | 2 +-
> drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c | 2 +-
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c | 2 +-
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
> index 813463ffe..cc4670316 100644
> --- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
> +++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
> @@ -424,7 +424,7 @@ struct integrated_info {
> /*
> * DFS-bypass flag
> */
> -/* Copy of SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS from atombios.h */
> +/* Copy of SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS from atombios.h */
> enum {
> DFS_BYPASS_ENABLE = 0x10
> };
> diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h
> index b78360a71..a99923b4e 100644
> --- a/drivers/gpu/drm/amd/include/atombios.h
> +++ b/drivers/gpu/drm/amd/include/atombios.h
> @@ -6017,7 +6017,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
> #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE 0x01
> #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE 0x02
> #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT 0x08
> -#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS 0x10
> +#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS 0x10
> //ulGPUCapInfo[16]=1 indicate SMC firmware is able to support GNB fast resume function, so that driver can call SMC to program most of GNB register during resuming, from ML
> #define SYS_INFO_GPUCAPS__GNB_FAST_RESUME_CAPABLE 0x00010000
>
> @@ -6460,7 +6460,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_9
>
> // ulGPUCapInfo
> #define SYS_INFO_V1_9_GPUCAPSINFO_DISABLE_AUX_MODE_DETECT 0x08
> -#define SYS_INFO_V1_9_GPUCAPSINFO_ENABEL_DFS_BYPASS 0x10
> +#define SYS_INFO_V1_9_GPUCAPSINFO_ENABLE_DFS_BYPASS 0x10
> //ulGPUCapInfo[16]=1 indicate SMC firmware is able to support GNB fast resume function, so that driver can call SMC to program most of GNB register during resuming, from ML
> #define SYS_INFO_V1_9_GPUCAPSINFO_GNB_FAST_RESUME_CAPABLE 0x00010000
> //ulGPUCapInfo[18]=1 indicate the IOMMU is not available
> diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
> index 0160d65f3..52eb3a474 100644
> --- a/drivers/gpu/drm/amd/include/atomfirmware.h
> +++ b/drivers/gpu/drm/amd/include/atomfirmware.h
> @@ -1713,7 +1713,7 @@ enum atom_system_vbiosmisc_def{
>
> // gpucapinfo
> enum atom_system_gpucapinf_def{
> - SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS = 0x10,
> + SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS = 0x10,
> };
>
> //dpphy_override
> diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
> index 59fae668d..34e71727b 100644
> --- a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
> @@ -2594,7 +2594,7 @@ static int kv_parse_sys_info_table(struct amdgpu_device *adev)
> le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
> }
> if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
> - SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
> + SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
> pi->caps_enable_dfs_bypass = true;
>
> sumo_construct_sclk_voltage_mapping_table(adev,
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
> index 9d3b33446..9b20076e2 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c
> @@ -394,7 +394,7 @@ static int smu8_get_system_info_data(struct pp_hwmgr *hwmgr)
> }
>
> if (le32_to_cpu(info->ulGPUCapInfo) &
> - SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS) {
> + SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS) {
> phm_cap_set(hwmgr->platform_descriptor.platformCaps,
> PHM_PlatformCaps_EnableDFSBypass);
> }
> --
> 2.39.5
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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