Linux Kernel Selftest development
 help / color / mirror / Atom feed
From: Colton Lewis <coltonlewis@google.com>
To: kvm@vger.kernel.org
Cc: Alexandru Elisei <alexandru.elisei@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Jonathan Corbet <corbet@lwn.net>,
	Russell King <linux@armlinux.org.uk>,
	 Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	 Oliver Upton <oliver.upton@linux.dev>,
	Mingwei Zhang <mizhang@google.com>,
	 Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	 Zenghui Yu <yuzenghui@huawei.com>,
	Mark Rutland <mark.rutland@arm.com>,
	 Shuah Khan <shuah@kernel.org>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	 linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	 linux-perf-users@vger.kernel.org,
	linux-kselftest@vger.kernel.org,
	 Colton Lewis <coltonlewis@google.com>
Subject: [PATCH v6 12/19] KVM: arm64: Enforce PMU event filter at vcpu_load()
Date: Mon,  9 Feb 2026 22:14:07 +0000	[thread overview]
Message-ID: <20260209221414.2169465-13-coltonlewis@google.com> (raw)
In-Reply-To: <20260209221414.2169465-1-coltonlewis@google.com>

The KVM API for event filtering says that counters do not count when
blocked by the event filter. To enforce that, the event filter must be
rechecked on every load since it might have changed since the last
time the guest wrote a value. If the event is filtered, exclude
counting at all exception levels before writing the hardware.

Signed-off-by: Colton Lewis <coltonlewis@google.com>
---
 arch/arm64/kvm/pmu-direct.c | 48 +++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm64/kvm/pmu-direct.c b/arch/arm64/kvm/pmu-direct.c
index b07b521543478..4bcacc55c507f 100644
--- a/arch/arm64/kvm/pmu-direct.c
+++ b/arch/arm64/kvm/pmu-direct.c
@@ -165,6 +165,53 @@ u8 kvm_pmu_hpmn(struct kvm_vcpu *vcpu)
 	return *host_data_ptr(nr_event_counters);
 }
 
+/**
+ * kvm_pmu_apply_event_filter()
+ * @vcpu: Pointer to vcpu struct
+ *
+ * To uphold the guarantee of the KVM PMU event filter, we must ensure
+ * no counter counts if the event is filtered. Accomplish this by
+ * filtering all exception levels if the event is filtered.
+ */
+static void kvm_pmu_apply_event_filter(struct kvm_vcpu *vcpu)
+{
+	struct arm_pmu *pmu = vcpu->kvm->arch.arm_pmu;
+	unsigned long guest_counters = kvm_pmu_guest_counter_mask(pmu);
+	u64 evtyper_set = ARMV8_PMU_EXCLUDE_EL0 |
+		ARMV8_PMU_EXCLUDE_EL1;
+	u64 evtyper_clr = ARMV8_PMU_INCLUDE_EL2;
+	bool guest_include_el2;
+	u8 i;
+	u64 val;
+	u64 evsel;
+
+	if (!pmu)
+		return;
+
+	for_each_set_bit(i, &guest_counters, ARMPMU_MAX_HWEVENTS) {
+		if (i == ARMV8_PMU_CYCLE_IDX) {
+			val = __vcpu_sys_reg(vcpu, PMCCFILTR_EL0);
+			evsel = ARMV8_PMUV3_PERFCTR_CPU_CYCLES;
+		} else {
+			val = __vcpu_sys_reg(vcpu, PMEVTYPER0_EL0 + i);
+			evsel = val & kvm_pmu_event_mask(vcpu->kvm);
+		}
+
+		guest_include_el2 = (val & ARMV8_PMU_INCLUDE_EL2);
+		val &= ~evtyper_clr;
+
+		if (unlikely(is_hyp_ctxt(vcpu)) && guest_include_el2)
+			val &= ~ARMV8_PMU_EXCLUDE_EL1;
+
+		if (vcpu->kvm->arch.pmu_filter &&
+		    !test_bit(evsel, vcpu->kvm->arch.pmu_filter))
+			val |= evtyper_set;
+
+		write_sysreg(i, pmselr_el0);
+		write_sysreg(val, pmxevtyper_el0);
+	}
+}
+
 /**
  * kvm_pmu_load() - Load untrapped PMU registers
  * @vcpu: Pointer to struct kvm_vcpu
@@ -192,6 +239,7 @@ void kvm_pmu_load(struct kvm_vcpu *vcpu)
 
 	pmu = vcpu->kvm->arch.arm_pmu;
 	guest_counters = kvm_pmu_guest_counter_mask(pmu);
+	kvm_pmu_apply_event_filter(vcpu);
 
 	for_each_set_bit(i, &guest_counters, ARMPMU_MAX_HWEVENTS) {
 		val = __vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i);
-- 
2.53.0.rc2.204.g2597b5adb4-goog


  parent reply	other threads:[~2026-02-09 22:40 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-09 22:13 [PATCH v6 00/19] ARM64 PMU Partitioning Colton Lewis
2026-02-09 22:13 ` [PATCH v6 01/19] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2026-02-09 22:13 ` [PATCH v6 02/19] KVM: arm64: Reorganize PMU includes Colton Lewis
2026-02-09 22:13 ` [PATCH v6 03/19] KVM: arm64: Reorganize PMU functions Colton Lewis
2026-02-09 22:13 ` [PATCH v6 04/19] perf: arm_pmuv3: Introduce method to partition the PMU Colton Lewis
2026-03-11 11:59   ` James Clark
2026-03-12 22:37     ` Colton Lewis
2026-03-11 17:45   ` James Clark
2026-03-12 22:37     ` Colton Lewis
2026-02-09 22:14 ` [PATCH v6 05/19] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2026-02-09 22:14 ` [PATCH v6 06/19] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2026-02-25 17:53   ` Colton Lewis
2026-03-11 12:00   ` James Clark
2026-03-12 22:39     ` Colton Lewis
2026-02-09 22:14 ` [PATCH v6 07/19] KVM: arm64: Set up FGT for Partitioned PMU Colton Lewis
2026-02-09 22:14 ` [PATCH v6 08/19] KVM: arm64: Define access helpers for PMUSERENR and PMSELR Colton Lewis
2026-02-10  4:30   ` kernel test robot
2026-02-10  5:20   ` kernel test robot
2026-02-09 22:14 ` [PATCH v6 09/19] KVM: arm64: Write fast path PMU register handlers Colton Lewis
2026-02-12  9:07   ` Marc Zyngier
2026-02-25 17:45     ` Colton Lewis
2026-02-09 22:14 ` [PATCH v6 10/19] KVM: arm64: Setup MDCR_EL2 to handle a partitioned PMU Colton Lewis
2026-02-09 22:14 ` [PATCH v6 11/19] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2026-03-11 12:01   ` James Clark
2026-03-12 22:39     ` Colton Lewis
2026-02-09 22:14 ` Colton Lewis [this message]
2026-02-09 22:14 ` [PATCH v6 13/19] KVM: arm64: Implement lazy PMU context swaps Colton Lewis
2026-02-09 22:14 ` [PATCH v6 14/19] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2026-02-10  4:51   ` kernel test robot
2026-02-10  7:32   ` kernel test robot
2026-02-09 22:14 ` [PATCH v6 15/19] KVM: arm64: Detect overflows for the Partitioned PMU Colton Lewis
2026-02-09 22:14 ` [PATCH v6 16/19] KVM: arm64: Add vCPU device attr to partition the PMU Colton Lewis
2026-02-10  5:55   ` kernel test robot
2026-03-05 10:16   ` James Clark
2026-03-12 22:13     ` Colton Lewis
2026-02-09 22:14 ` [PATCH v6 17/19] KVM: selftests: Add find_bit to KVM library Colton Lewis
2026-02-09 22:14 ` [PATCH v6 18/19] KVM: arm64: selftests: Add test case for partitioned PMU Colton Lewis
2026-02-09 22:14 ` [PATCH v6 19/19] KVM: arm64: selftests: Relax testing for exceptions when partitioned Colton Lewis
2026-02-10  8:49 ` [PATCH v6 00/19] ARM64 PMU Partitioning Marc Zyngier
2026-02-12 21:08   ` Colton Lewis
2026-02-13  8:11     ` Marc Zyngier
2026-02-25 17:40       ` Colton Lewis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260209221414.2169465-13-coltonlewis@google.com \
    --to=coltonlewis@google.com \
    --cc=alexandru.elisei@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=corbet@lwn.net \
    --cc=gankulkarni@os.amperecomputing.com \
    --cc=joey.gouly@arm.com \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-kselftest@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=mizhang@google.com \
    --cc=oliver.upton@linux.dev \
    --cc=pbonzini@redhat.com \
    --cc=shuah@kernel.org \
    --cc=suzuki.poulose@arm.com \
    --cc=will@kernel.org \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox