[PATCH v2 0/9] KVM: selftests: Add Zhaoxin CPU support

[PATCH v2 0/9] KVM: selftests: Add Zhaoxin CPU support

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

This series adds Zhaoxin CPU support to the KVM x86 selftests.

Zhaoxin CPUs use the "CentaurHauls" and "  Shanghai  " vendor strings
and implement VMX-compatible virtualization, so KVM handles them via
its VMX backend.  Several selftests currently assume a CPU is either
Intel or AMD, which makes them misbehave or skip on Zhaoxin hosts.

Patch 1 adds Zhaoxin detection and the compatibility flag. Patch 2
updates the mediated PMU parameter lookup. Patches 3-5 and 7 apply the
compatibility flag to VMX-backed paths. Patch 6 handles feature MSR
testing without PDCM, patch 8 handles Zhaoxin's #GP error-code behavior,
and patch 9 checks APIC-access virtualization support.

Frank Zhu (9):
  KVM: selftests: Add Zhaoxin CPU detection support
  KVM: selftests: Use host_cpu_is_intel_compatible for mediated PMU
  KVM: selftests: nx_huge_pages_test: Add TDP detection for Zhaoxin CPUs
  KVM: selftests: vmx_exception_with_invalid_guest_state: Support
    Zhaoxin CPUs
  KVM: selftests: fix_hypercall_test: Add Zhaoxin CPU support
  KVM: selftests: Skip PERF_CAPABILITIES vCPU checks without PDCM
  KVM: selftests: feature_msrs_test: Extend MSR_IA32_UCODE_REV quirk to
    Zhaoxin
  KVM: selftests: nested_exceptions_test: Add Zhaoxin CPU support
  KVM: selftests: vmx_apic_access_test: Check APIC virtualization
    support

 .../testing/selftests/kvm/include/x86/processor.h | 10 +++++++++-
 tools/testing/selftests/kvm/include/x86/vmx.h     |  1 +
 tools/testing/selftests/kvm/lib/x86/processor.c   |  8 +++++++-
 tools/testing/selftests/kvm/lib/x86/vmx.c         | 15 +++++++++++++++
 .../testing/selftests/kvm/x86/feature_msrs_test.c | 15 ++++++++++++++-
 .../selftests/kvm/x86/fix_hypercall_test.c        |  2 +-
 .../selftests/kvm/x86/nested_exceptions_test.c    |  4 +++-
 .../selftests/kvm/x86/vmx_apic_access_test.c      |  1 +
 .../x86/vmx_exception_with_invalid_guest_state.c  |  2 +-
 9 files changed, 52 insertions(+), 6 deletions(-)

Changes since v1:
- Rebase the series onto kvm-x86/next.
- Spell out Zhaoxin in helper, macro, and patch names.
- Add a new patch (2/9) to use host_cpu_is_intel_compatible in
  kvm_is_mediated_pmu_enabled() so Zhaoxin CPUs look up the mediated
  PMU parameter from kvm_intel.
- Reword the Zhaoxin CPU detection commit message to document the new
  host_cpu_is_intel_compatible flag.
- Expand the nested_exceptions_test commit message to explain why
  Zhaoxin CPUs leave EXT clear for the #GP generated when vectoring
  an injected #SS.

base-commit: 76671054f9a1ff6abb976583cd8da37650acdc97
-- 
2.34.1

[PATCH v2 1/9] KVM: selftests: Add Zhaoxin CPU detection support

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

Add helpers to detect Zhaoxin CPUs using the "CentaurHauls" and
"  Shanghai  " vendor strings.

KVM handles Zhaoxin CPUs with its VMX backend. Add
host_cpu_is_intel_compatible for selftests that exercise behavior shared
by Intel and Zhaoxin CPUs, while retaining host_cpu_is_zhaoxin for
Zhaoxin-specific behavior.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/include/x86/processor.h | 8 ++++++++
 tools/testing/selftests/kvm/lib/x86/processor.c     | 6 ++++++
 2 files changed, 14 insertions(+)

diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/testing/selftests/kvm/include/x86/processor.h
index 6e6f70035..5d2be3399 100644
--- a/tools/testing/selftests/kvm/include/x86/processor.h
+++ b/tools/testing/selftests/kvm/include/x86/processor.h
@@ -23,6 +23,8 @@ extern bool host_cpu_is_intel;
 extern bool host_cpu_is_amd;
 extern bool host_cpu_is_hygon;
 extern bool host_cpu_is_amd_compatible;
+extern bool host_cpu_is_zhaoxin;
+extern bool host_cpu_is_intel_compatible;
 extern u64 guest_tsc_khz;
 extern struct kvm_mmu guest_mmu;
 
@@ -782,6 +784,12 @@ static inline bool this_cpu_is_hygon(void)
 	return this_cpu_vendor_string_is("HygonGenuine");
 }
 
+static inline bool this_cpu_is_zhaoxin(void)
+{
+	return this_cpu_vendor_string_is("CentaurHauls") ||
+	       this_cpu_vendor_string_is("  Shanghai  ");
+}
+
 static inline u32 __this_cpu_has(u32 function, u32 index, u8 reg, u8 lo, u8 hi)
 {
 	u32 gprs[4];
diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testing/selftests/kvm/lib/x86/processor.c
index d31fa81ea..a183cf005 100644
--- a/tools/testing/selftests/kvm/lib/x86/processor.c
+++ b/tools/testing/selftests/kvm/lib/x86/processor.c
@@ -26,6 +26,8 @@ bool host_cpu_is_amd;
 bool host_cpu_is_intel;
 bool host_cpu_is_hygon;
 bool host_cpu_is_amd_compatible;
+bool host_cpu_is_zhaoxin;
+bool host_cpu_is_intel_compatible;
 bool is_forced_emulation_enabled;
 u64 guest_tsc_khz;
 struct kvm_mmu guest_mmu;
@@ -819,6 +821,8 @@ void kvm_arch_vm_post_create(struct kvm_vm *vm, unsigned int nr_vcpus)
 	sync_global_to_guest(vm, host_cpu_is_amd);
 	sync_global_to_guest(vm, host_cpu_is_hygon);
 	sync_global_to_guest(vm, host_cpu_is_amd_compatible);
+	sync_global_to_guest(vm, host_cpu_is_zhaoxin);
+	sync_global_to_guest(vm, host_cpu_is_intel_compatible);
 	sync_global_to_guest(vm, is_forced_emulation_enabled);
 	sync_global_to_guest(vm, pmu_errata_mask);
 
@@ -1444,6 +1448,8 @@ void kvm_selftest_arch_init(void)
 	host_cpu_is_amd = this_cpu_is_amd();
 	host_cpu_is_hygon = this_cpu_is_hygon();
 	host_cpu_is_amd_compatible = host_cpu_is_amd || host_cpu_is_hygon;
+	host_cpu_is_zhaoxin = this_cpu_is_zhaoxin();
+	host_cpu_is_intel_compatible = host_cpu_is_intel || host_cpu_is_zhaoxin;
 	is_forced_emulation_enabled = kvm_is_forced_emulation_enabled();
 
 	kvm_init_pmu_errata();
-- 
2.34.1

[PATCH v2 2/9] KVM: selftests: Use host_cpu_is_intel_compatible for mediated PMU

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

kvm_is_mediated_pmu_enabled() returns kvm_amd's enable_mediated_pmu
module parameter unless the host CPU is Intel.  Zhaoxin CPUs implement
VMX-compatible virtualization and are handled by KVM's VMX backend, so
on Zhaoxin hosts the helper wrongly reports kvm_amd's parameter.

Gate the check on host_cpu_is_intel_compatible so that Zhaoxin CPUs,
like Intel CPUs, query kvm_intel's enable_mediated_pmu instead.  This
does not change behavior on Intel, and AMD and other non-Intel-
compatible CPUs still fall back to kvm_amd's parameter.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/include/x86/processor.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/testing/selftests/kvm/include/x86/processor.h
index 5d2be3399..df368232c 100644
--- a/tools/testing/selftests/kvm/include/x86/processor.h
+++ b/tools/testing/selftests/kvm/include/x86/processor.h
@@ -1454,7 +1454,7 @@ static inline bool kvm_is_pmu_enabled(void)
 
 static inline bool kvm_is_mediated_pmu_enabled(void)
 {
-	if (host_cpu_is_intel)
+	if (host_cpu_is_intel_compatible)
 		return get_kvm_intel_param_bool("enable_mediated_pmu");
 
 	return get_kvm_amd_param_bool("enable_mediated_pmu");
-- 
2.34.1

[PATCH v2 3/9] KVM: selftests: nx_huge_pages_test: Add TDP detection for Zhaoxin CPUs

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

Update the kvm_is_tdp_enabled() function to include Zhaoxin CPUs
when checking for EPT (Extended Page Tables) support. This ensures
that Zhaoxin CPUs use the appropriate TDP (Two-Dimensional Paging)
parameter check, similar to Intel CPUs.

The change modifies the condition to check for both Intel and Zhaoxin
CPUs before querying the EPT parameter, maintaining compatibility
with existing Intel systems while extending support to Zhaoxin CPU
systems.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/lib/x86/processor.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testing/selftests/kvm/lib/x86/processor.c
index a183cf005..bd50c1265 100644
--- a/tools/testing/selftests/kvm/lib/x86/processor.c
+++ b/tools/testing/selftests/kvm/lib/x86/processor.c
@@ -160,7 +160,7 @@ static void sregs_dump(FILE *stream, struct kvm_sregs *sregs, u8 indent)
 
 bool kvm_is_tdp_enabled(void)
 {
-	if (host_cpu_is_intel)
+	if (host_cpu_is_intel_compatible)
 		return get_kvm_intel_param_bool("ept");
 	else
 		return get_kvm_amd_param_bool("npt");
-- 
2.34.1

[PATCH v2 4/9] KVM: selftests: vmx_exception_with_invalid_guest_state: Support Zhaoxin CPUs

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

The vmx_exception_with_invalid_guest_state test currently requires an
Intel CPU. However, Zhaoxin CPUs also support VMX and the relevant
invalid guest state handling under KVM.

Update the test requirement to allow execution on Zhaoxin platforms in
addition to Intel, enabling broader coverage of VMX-related error paths.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 .../selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c  | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c b/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c
index 2cae86d9d..08a0caa9c 100644
--- a/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c
+++ b/tools/testing/selftests/kvm/x86/vmx_exception_with_invalid_guest_state.c
@@ -109,7 +109,7 @@ int main(int argc, char *argv[])
 	struct kvm_vcpu *vcpu;
 	struct kvm_vm *vm;
 
-	TEST_REQUIRE(host_cpu_is_intel);
+	TEST_REQUIRE(host_cpu_is_intel_compatible);
 	TEST_REQUIRE(!kvm_is_unrestricted_guest_enabled());
 
 	vm = vm_create_with_one_vcpu(&vcpu, guest_code);
-- 
2.34.1

[PATCH v2 5/9] KVM: selftests: fix_hypercall_test: Add Zhaoxin CPU support

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

Zhaoxin CPUs use VMCALL as the native hypercall instruction. Use
host_cpu_is_intel_compatible so that fix_hypercall_test selects the
VMX hypercall path on Zhaoxin CPUs.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/x86/fix_hypercall_test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/x86/fix_hypercall_test.c b/tools/testing/selftests/kvm/x86/fix_hypercall_test.c
index 4931ec227..f11fcc520 100644
--- a/tools/testing/selftests/kvm/x86/fix_hypercall_test.c
+++ b/tools/testing/selftests/kvm/x86/fix_hypercall_test.c
@@ -48,7 +48,7 @@ static void guest_main(void)
 	const u8 *other_hypercall_insn;
 	u64 ret;
 
-	if (host_cpu_is_intel) {
+	if (host_cpu_is_intel_compatible) {
 		native_hypercall_insn = vmx_vmcall;
 		other_hypercall_insn  = svm_vmmcall;
 	} else if (host_cpu_is_amd_compatible) {
-- 
2.34.1

[PATCH v2 6/9] KVM: selftests: Skip PERF_CAPABILITIES vCPU checks without PDCM

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

KVM allows userspace to query MSR_IA32_PERF_CAPABILITIES through
KVM_GET_MSRS even when PDCM is not exposed in KVM_GET_SUPPORTED_CPUID.
However, vCPU accesses to the MSR fail without PDCM.

Keep the feature MSR query, but skip its checks when KVM does not
expose PDCM, allowing feature_msrs_test to continue checking the
remaining feature MSRs.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/x86/feature_msrs_test.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/tools/testing/selftests/kvm/x86/feature_msrs_test.c b/tools/testing/selftests/kvm/x86/feature_msrs_test.c
index 158550701..9602e29bf 100644
--- a/tools/testing/selftests/kvm/x86/feature_msrs_test.c
+++ b/tools/testing/selftests/kvm/x86/feature_msrs_test.c
@@ -54,6 +54,19 @@ static void test_feature_msr(u32 msr)
 	if (is_kvm_controlled_msr(msr))
 		return;
 
+	/*
+	 * KVM allows userspace to query MSR_IA32_PERF_CAPABILITIES as a
+	 * feature MSR even if KVM doesn't expose PDCM, but vCPU accesses to
+	 * the MSR will fail in that case. Skip the vCPU checks so that the
+	 * remaining feature MSRs can be tested.
+	 */
+	if (msr == MSR_IA32_PERF_CAPABILITIES &&
+	    !kvm_cpu_has(X86_FEATURE_PDCM)) {
+		printf("KVM does not expose PDCM, skipping vCPU checks for "
+		       "MSR_IA32_PERF_CAPABILITIES (0x%x).\n", msr);
+		return;
+	}
+
 	/*
 	 * More goofy behavior.  KVM reports the host CPU's actual revision ID,
 	 * but initializes the vCPU's revision ID to an arbitrary value.
-- 
2.34.1

Re: [PATCH v2 6/9] KVM: selftests: Skip PERF_CAPABILITIES vCPU checks without PDCM

[Sean Christopherson]

On Thu, Sep 10, 2026, Ewan Hai-oc wrote:
> From: Frank Zhu <frankzhu@zhaoxin.com>
> 
> KVM allows userspace to query MSR_IA32_PERF_CAPABILITIES through
> KVM_GET_MSRS even when PDCM is not exposed in KVM_GET_SUPPORTED_CPUID.
> However, vCPU accesses to the MSR fail without PDCM.

Hrm, no, KVM is supposed to allow reads and drop writes of '0' for MSRs that are
advertised to userspace, but ultimately unsupported.  I'm pretty sure this is a
KVM bug.  I think MSR_IA32_ARCH_CAPABILITIES is also affected.

Completely untested, but I think this?

diff --git a/arch/x86/kvm/msrs.c b/arch/x86/kvm/msrs.c
index dd3bb04878ca..fa77cfdbda7e 100644
--- a/arch/x86/kvm/msrs.c
+++ b/arch/x86/kvm/msrs.c
@@ -512,9 +512,15 @@ static int kvm_get_feature_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
 
 	switch (index) {
 	case MSR_IA32_ARCH_CAPABILITIES:
+		if (!kvm_cpu_cap_has(X86_FEATURE_ARCH_CAPABILITIES))
+			return KVM_MSR_RET_UNSUPPORTED;
+
 		*data = kvm_get_arch_capabilities();
 		break;
 	case MSR_IA32_PERF_CAPABILITIES:
+		if (!kvm_cpu_cap_has(X86_FEATURE_PDCM))
+			return KVM_MSR_RET_UNSUPPORTED;
+
 		*data = kvm_caps.supported_perf_cap;
 		break;
 	case MSR_PLATFORM_INFO:

[PATCH v2 7/9] KVM: selftests: feature_msrs_test: Extend MSR_IA32_UCODE_REV quirk to Zhaoxin

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

Zhaoxin CPUs use KVM's VMX backend and therefore observe the same
KVM-defined initial value as Intel vCPUs. Update feature_msrs_test to
expect 0x100000000ULL for Zhaoxin vCPUs.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/x86/feature_msrs_test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/x86/feature_msrs_test.c b/tools/testing/selftests/kvm/x86/feature_msrs_test.c
index 9602e29bf..bb339709d 100644
--- a/tools/testing/selftests/kvm/x86/feature_msrs_test.c
+++ b/tools/testing/selftests/kvm/x86/feature_msrs_test.c
@@ -72,7 +72,7 @@ static void test_feature_msr(u32 msr)
 	 * but initializes the vCPU's revision ID to an arbitrary value.
 	 */
 	if (msr == MSR_IA32_UCODE_REV)
-		reset_value = host_cpu_is_intel ? 0x100000000ULL : 0x01000065;
+		reset_value = host_cpu_is_intel_compatible ? 0x100000000ULL : 0x01000065;
 
 	/*
 	 * For quirked MSRs, KVM's ABI is to initialize the vCPU's value to the
-- 
2.34.1

[PATCH v2 8/9] KVM: selftests: nested_exceptions_test: Add Zhaoxin CPU support

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

When vectoring an injected #SS through the empty L2 IDT, Zhaoxin CPUs
report the resulting #GP with the IDT bit set and EXT clear. Zhaoxin
sets EXT only for interrupt delivery and selected guest-mode events; #SS
delivery is not one of those cases.

Expect error code 0x62 when running the test on Zhaoxin CPUs.

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/x86/nested_exceptions_test.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/kvm/x86/nested_exceptions_test.c b/tools/testing/selftests/kvm/x86/nested_exceptions_test.c
index aeec3121c..78c27fa7c 100644
--- a/tools/testing/selftests/kvm/x86/nested_exceptions_test.c
+++ b/tools/testing/selftests/kvm/x86/nested_exceptions_test.c
@@ -38,6 +38,7 @@
  */
 #define GP_ERROR_CODE_AMD ((SS_VECTOR * 8) | ERROR_CODE_IDT_FLAG)
 #define GP_ERROR_CODE_INTEL ((SS_VECTOR * 8) | ERROR_CODE_IDT_FLAG | ERROR_CODE_EXT_FLAG)
+#define GP_ERROR_CODE_ZHAOXIN ((SS_VECTOR * 8) | ERROR_CODE_IDT_FLAG)
 
 /*
  * Intel and AMD both shove '0' into the error code on #DF, regardless of what
@@ -139,7 +140,8 @@ static void l1_vmx_code(struct vmx_pages *vmx)
 	 */
 	GUEST_ASSERT_EQ(vmwrite(EXCEPTION_BITMAP, INTERCEPT_SS_GP_DF), 0);
 	vmx_run_l2(l2_ss_pending_test, SS_VECTOR, (u16)SS_ERROR_CODE);
-	vmx_run_l2(l2_ss_injected_gp_test, GP_VECTOR, GP_ERROR_CODE_INTEL);
+	vmx_run_l2(l2_ss_injected_gp_test, GP_VECTOR,
+		   host_cpu_is_zhaoxin ? GP_ERROR_CODE_ZHAOXIN : GP_ERROR_CODE_INTEL);
 
 	GUEST_ASSERT_EQ(vmwrite(EXCEPTION_BITMAP, INTERCEPT_SS_DF), 0);
 	vmx_run_l2(l2_ss_injected_df_test, DF_VECTOR, DF_ERROR_CODE);
-- 
2.34.1

[PATCH v2 9/9] KVM: selftests: vmx_apic_access_test: Check APIC virtualization support

[Ewan Hai-oc]

From: Frank Zhu <frankzhu@zhaoxin.com>

Not all CPUs that support VMX necessarily support the "virtualize APIC
accesses" secondary processor-based VM-execution control. For example,
some Zhaoxin CPUs lack this feature. Add a capability check before
running the test to properly skip on unsupported hardware instead of
failing.

Add kvm_cpu_has_vmx_apic_access_virt() helper to vmx.c, following the
same pattern as kvm_cpu_has_ept().

Signed-off-by: Frank Zhu <frankzhu@zhaoxin.com>
---
 tools/testing/selftests/kvm/include/x86/vmx.h     |  1 +
 tools/testing/selftests/kvm/lib/x86/vmx.c         | 15 +++++++++++++++
 .../selftests/kvm/x86/vmx_apic_access_test.c      |  1 +
 3 files changed, 17 insertions(+)

diff --git a/tools/testing/selftests/kvm/include/x86/vmx.h b/tools/testing/selftests/kvm/include/x86/vmx.h
index 04f5e34de..b196651bd 100644
--- a/tools/testing/selftests/kvm/include/x86/vmx.h
+++ b/tools/testing/selftests/kvm/include/x86/vmx.h
@@ -557,6 +557,7 @@ bool load_vmcs(struct vmx_pages *vmx);
 bool ept_1g_pages_supported(void);
 
 bool kvm_cpu_has_ept(void);
+bool kvm_cpu_has_vmx_apic_access_virt(void);
 void vm_enable_ept(struct kvm_vm *vm);
 void prepare_virtualize_apic_accesses(struct vmx_pages *vmx, struct kvm_vm *vm);
 
diff --git a/tools/testing/selftests/kvm/lib/x86/vmx.c b/tools/testing/selftests/kvm/lib/x86/vmx.c
index 089e1a8af..e512191f1 100644
--- a/tools/testing/selftests/kvm/lib/x86/vmx.c
+++ b/tools/testing/selftests/kvm/lib/x86/vmx.c
@@ -390,6 +390,21 @@ bool kvm_cpu_has_ept(void)
 	return ctrl & SECONDARY_EXEC_ENABLE_EPT;
 }
 
+bool kvm_cpu_has_vmx_apic_access_virt(void)
+{
+	u64 ctrl;
+
+	if (!kvm_cpu_has(X86_FEATURE_VMX))
+		return false;
+
+	ctrl = kvm_get_feature_msr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS) >> 32;
+	if (!(ctrl & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
+		return false;
+
+	ctrl = kvm_get_feature_msr(MSR_IA32_VMX_PROCBASED_CTLS2) >> 32;
+	return ctrl & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
+}
+
 void prepare_virtualize_apic_accesses(struct vmx_pages *vmx, struct kvm_vm *vm)
 {
 	vmx->apic_access = (void *)vm_alloc_page(vm);
diff --git a/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c b/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c
index 463f73aa9..a1b6da4c0 100644
--- a/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c
+++ b/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c
@@ -78,6 +78,7 @@ int main(int argc, char *argv[])
 	struct kvm_vm *vm;
 
 	TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX));
+	TEST_REQUIRE(kvm_cpu_has_vmx_apic_access_virt());
 
 	vm = vm_create_with_one_vcpu(&vcpu, l1_guest_code);
 
-- 
2.34.1

Re: [PATCH v2 9/9] KVM: selftests: vmx_apic_access_test: Check APIC virtualization support

[Sean Christopherson]

On Thu, Sep 10, 2026, Ewan Hai-oc wrote:
> diff --git a/tools/testing/selftests/kvm/lib/x86/vmx.c b/tools/testing/selftests/kvm/lib/x86/vmx.c
> index 089e1a8af..e512191f1 100644
> --- a/tools/testing/selftests/kvm/lib/x86/vmx.c
> +++ b/tools/testing/selftests/kvm/lib/x86/vmx.c
> @@ -390,6 +390,21 @@ bool kvm_cpu_has_ept(void)
>  	return ctrl & SECONDARY_EXEC_ENABLE_EPT;
>  }
>  
> +bool kvm_cpu_has_vmx_apic_access_virt(void)

This should be kvm_cpu_has_vmx_virtualize_apic_accesses() to match the macro, and
to match what KVM itself uses.

> +{
> +	u64 ctrl;
> +
> +	if (!kvm_cpu_has(X86_FEATURE_VMX))
> +		return false;
> +
> +	ctrl = kvm_get_feature_msr(MSR_IA32_VMX_TRUE_PROCBASED_CTLS) >> 32;
> +	if (!(ctrl & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
> +		return false;
> +
> +	ctrl = kvm_get_feature_msr(MSR_IA32_VMX_PROCBASED_CTLS2) >> 32;
> +	return ctrl & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;

Carve out the guts of kvm_cpu_has_ept() into a helper isntead of copy+pasting.

> +}
> +
>  void prepare_virtualize_apic_accesses(struct vmx_pages *vmx, struct kvm_vm *vm)
>  {
>  	vmx->apic_access = (void *)vm_alloc_page(vm);
> diff --git a/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c b/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c
> index 463f73aa9..a1b6da4c0 100644
> --- a/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c
> +++ b/tools/testing/selftests/kvm/x86/vmx_apic_access_test.c
> @@ -78,6 +78,7 @@ int main(int argc, char *argv[])
>  	struct kvm_vm *vm;
>  
>  	TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX));
> +	TEST_REQUIRE(kvm_cpu_has_vmx_apic_access_virt());

This can replace the X86_FEATURE_VMX check, since KVM shouldn't report support
for virtualizing APIC accesses without VMX.

No need for a new version, I'll fixup everything when applying.