[PATCH] m68k: add ColdFire FPU support for the V4e ColdFire CPU's

[<gerg@snapgear.com>]

Hi All,

Here is an improved patch set for FPU support on the ColdFire V4e.
Much cleaner than the ifdefery for this in the ColdFire/MMU patch
set I sent recently. (So of course this replaces that patch).

Does anyone know why some of the code for using fsave/frestore is
surrounded by ".chip" directives and others are not?  For example
in arch/m68k/kernel/process_mm.c you will find this:

       __asm__ volatile (".chip 68k/68881\n\t"
                          "frestore %0\n\t"
                          ".chip 68k" : : "m" (*sc->sc_fpstate));

and you will also find this:

	asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));

I can use the second form directly on ColdFire, but not the first...

Regards
Greg