From: Sakari Ailus <sakari.ailus@linux.intel.com>
To: linux-media@vger.kernel.org
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
dongcheng.yan@intel.com
Subject: [PATCH v3 09/11] media: ccs-pll: Better validate VT PLL branch
Date: Wed, 23 Apr 2025 15:33:57 +0300 [thread overview]
Message-ID: <20250423123359.1800904-10-sakari.ailus@linux.intel.com> (raw)
In-Reply-To: <20250423123359.1800904-1-sakari.ailus@linux.intel.com>
Check that the VT PLL dividers are actually found, don't trust they always
are even though they should be.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
drivers/media/i2c/ccs-pll.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
index f4be4e9f6777..8de8158a413b 100644
--- a/drivers/media/i2c/ccs-pll.c
+++ b/drivers/media/i2c/ccs-pll.c
@@ -449,7 +449,7 @@ static int ccs_pll_calculate_vt_tree(struct device *dev,
return -EINVAL;
}
-static void
+static int
ccs_pll_calculate_vt(struct device *dev, const struct ccs_pll_limits *lim,
const struct ccs_pll_branch_limits_bk *op_lim_bk,
struct ccs_pll *pll, struct ccs_pll_branch_fr *pll_fr,
@@ -572,6 +572,8 @@ ccs_pll_calculate_vt(struct device *dev, const struct ccs_pll_limits *lim,
if (best_pix_div < SHRT_MAX >> 1)
break;
}
+ if (best_pix_div == SHRT_MAX >> 1)
+ return -EINVAL;
pll->vt_bk.sys_clk_div = DIV_ROUND_UP(vt_div, best_pix_div);
pll->vt_bk.pix_clk_div = best_pix_div;
@@ -584,6 +586,8 @@ ccs_pll_calculate_vt(struct device *dev, const struct ccs_pll_limits *lim,
out_calc_pixel_rate:
pll->pixel_rate_pixel_array =
pll->vt_bk.pix_clk_freq_hz * pll->vt_lanes;
+
+ return 0;
}
/*
@@ -863,8 +867,10 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
if (pll->flags & CCS_PLL_FLAG_DUAL_PLL)
break;
- ccs_pll_calculate_vt(dev, lim, op_lim_bk, pll, op_pll_fr,
- op_pll_bk, cphy, phy_const);
+ rval = ccs_pll_calculate_vt(dev, lim, op_lim_bk, pll, op_pll_fr,
+ op_pll_bk, cphy, phy_const);
+ if (rval)
+ continue;
rval = check_bk_bounds(dev, lim, pll, PLL_VT);
if (rval)
--
2.39.5
next prev parent reply other threads:[~2025-04-23 12:34 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 12:33 [PATCH v3 00/11] CCS PLL fixes and improvements Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 01/11] media: ccs-pll: Start OP pre-PLL multiplier search from correct value Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 02/11] media: ccs-pll: Start VT " Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 03/11] media: ccs-pll: Check for too high VT PLL multiplier in dual PLL case Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 04/11] media: ccs-pll: Correct the upper limit of maximum op_pre_pll_clk_div Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 05/11] media: ccs-pll: Print a debug message on too high VT PLL OP clock Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 06/11] media: ccs-pll: Drop LINK_DECOUPLED flag Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 07/11] media: ccs-pll: Print missing PLL flags Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 08/11] media: ccs-pll: Add a flag for even PLL multipliers Sakari Ailus
2025-04-23 21:49 ` Laurent Pinchart
2025-04-23 12:33 ` Sakari Ailus [this message]
2025-04-23 12:33 ` [PATCH v3 10/11] media: ccs-pll: Print PLL calculator flags in the beginning Sakari Ailus
2025-04-23 12:33 ` [PATCH v3 11/11] media: ccs-pll: Document the CCS PLL flags Sakari Ailus
2025-04-23 12:43 ` Laurent Pinchart
2025-04-23 12:51 ` Sakari Ailus
2025-04-23 15:37 ` [PATCH v4 " Sakari Ailus
2025-04-23 17:50 ` Laurent Pinchart
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