From: Biao Huang <biao.huang@mediatek.com>
To: Jose Abreu <joabreu@synopsys.com>, davem@davemloft.net
Cc: jianguo.zhang@mediatek.com,
Alexandre Torgue <alexandre.torgue@st.com>,
biao.huang@mediatek.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, yt.shen@mediatek.com,
linux-mediatek@lists.infradead.org,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
Subject: [v2, PATCH 4/4] net: stmmac: dwmac-mediatek: modify csr_clk value to fix mdio read/write fail
Date: Tue, 14 May 2019 10:28:53 +0800 [thread overview]
Message-ID: <1557800933-30759-5-git-send-email-biao.huang@mediatek.com> (raw)
In-Reply-To: <1557800933-30759-1-git-send-email-biao.huang@mediatek.com>
1. the frequency of csr clock is 66.5MHz, so the csr_clk value should
be 0 other than 5.
2. the csr_clk can be got from device tree, so remove initialization here.
Change-Id: I3cd92fe380150fec6daa2d3acaab69a6d58344c0
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-mediatek.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
index bf25629..126b66b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
@@ -346,8 +346,6 @@ static int mediatek_dwmac_probe(struct platform_device *pdev)
return PTR_ERR(plat_dat);
plat_dat->interface = priv_plat->phy_mode;
- /* clk_csr_i = 250-300MHz & MDC = clk_csr_i/124 */
- plat_dat->clk_csr = 5;
plat_dat->has_gmac4 = 1;
plat_dat->has_gmac = 0;
plat_dat->pmt = 0;
--
1.7.9.5
next prev parent reply other threads:[~2019-05-14 2:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-14 2:28 [v2, PATCH 0/4] fix some bugs in stmmac Biao Huang
2019-05-14 2:28 ` [v2, PATCH 1/4] net: stmmac: update rx tail pointer register to fix rx dma hang issue Biao Huang
2019-05-14 2:28 ` [v2, PATCH 2/4] net: stmmac: fix csr_clk can't be zero issue Biao Huang
2019-05-14 2:28 ` [v2, PATCH 3/4] net: stmmac: write the modified value back to MTL_OPERATION_MODE Biao Huang
2019-05-14 2:28 ` Biao Huang [this message]
2019-05-14 3:00 ` [v2, PATCH 0/4] fix some bugs in stmmac Andrew Lunn
2019-05-14 3:38 ` biao huang
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