[PATCH v2 0/3] arm: dts: mediatek: fix pinctl node names

[PATCH v2 0/3] arm: dts: mediatek: fix pinctl node names

[David Lechner]

While passing by, I noticed that the pinctrl nodes in a couple of dtsi
files did not match the addresses in their reg properties. Here are some
patches to fix that.

Signed-off-by: David Lechner <dlechner@baylibre.com>
---
Changes in v2:
- Add a new patch to also fix the pinctrl child node names in the
  mt7623.dtsi file.
- Link to v1: https://lore.kernel.org/r/20260106-mtk-fix-mt7623-pinctl-name-v1-0-33817c7f78ee@baylibre.com

---
David Lechner (3):
      arm: dts: mediatek: mt7623: fix pinctrl child node names
      arm: dts: mediatek: mt7623: fix pinctrl controller node name
      arm: dts: mediatek: mt8135: fix pinctrl node name

 arch/arm/boot/dts/mediatek/mt7623.dtsi | 64 +++++++++++++++++-----------------
 arch/arm/boot/dts/mediatek/mt8135.dtsi |  2 +-
 2 files changed, 33 insertions(+), 33 deletions(-)
---
base-commit: 3f9cd19e764b782706dbaacc69e502099cb014ba
change-id: 20260106-mtk-fix-mt7623-pinctl-name-f8593953bed7

Best regards,
-- 
David Lechner <dlechner@baylibre.com>

[PATCH v2 1/3] arm: dts: mediatek: mt7623: fix pinctrl child node names

[David Lechner]

Fix the pinctrl child node names to adhere to the bindings. The main pin
node is supposed to be named like "something-pins" and the pinmux node
named like "pins-something".

Signed-off-by: David Lechner <dlechner@baylibre.com>
---
 arch/arm/boot/dts/mediatek/mt7623.dtsi | 62 +++++++++++++++++-----------------
 1 file changed, 31 insertions(+), 31 deletions(-)

diff --git a/arch/arm/boot/dts/mediatek/mt7623.dtsi b/arch/arm/boot/dts/mediatek/mt7623.dtsi
index 71ac2b94c6ba..f34f60cde594 100644
--- a/arch/arm/boot/dts/mediatek/mt7623.dtsi
+++ b/arch/arm/boot/dts/mediatek/mt7623.dtsi
@@ -1017,14 +1017,14 @@ bdpsys: syscon@1c000000 {
 };
 
 &pio {
-	cir_pins_a:cir-default {
+	cir_pins_a: cir-default-pins {
 		pins-cir {
 			pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
 			bias-disable;
 		};
 	};
 
-	i2c0_pins_a: i2c0-default {
+	i2c0_pins_a: i2c0-default-pins {
 		pins-i2c0 {
 			pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
 				 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
@@ -1032,40 +1032,40 @@ pins-i2c0 {
 		};
 	};
 
-	i2c1_pins_a: i2c1-default {
-		pin-i2c1 {
+	i2c1_pins_a: i2c1-default-pins {
+		pins-i2c1 {
 			pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
 				 <MT7623_PIN_58_SCL1_FUNC_SCL1>;
 			bias-disable;
 		};
 	};
 
-	i2c1_pins_b: i2c1-alt {
-		pin-i2c1 {
+	i2c1_pins_b: i2c1-alt-pins {
+		pins-i2c1 {
 			pinmux = <MT7623_PIN_242_URTS2_FUNC_SCL1>,
 				 <MT7623_PIN_243_UCTS2_FUNC_SDA1>;
 			bias-disable;
 		};
 	};
 
-	i2c2_pins_a: i2c2-default {
-		pin-i2c2 {
+	i2c2_pins_a: i2c2-default-pins {
+		pins-i2c2 {
 			pinmux = <MT7623_PIN_77_SDA2_FUNC_SDA2>,
 				 <MT7623_PIN_78_SCL2_FUNC_SCL2>;
 			bias-disable;
 		};
 	};
 
-	i2c2_pins_b: i2c2-alt {
-		pin-i2c2 {
+	i2c2_pins_b: i2c2-alt-pins {
+		pins-i2c2 {
 			pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,
 				 <MT7623_PIN_123_HTPLG_FUNC_SCL2>;
 			bias-disable;
 		};
 	};
 
-	i2s0_pins_a: i2s0-default {
-		pin-i2s0 {
+	i2s0_pins_a: i2s0-default-pins {
+		pins-i2s0 {
 			pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
 				 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
 				 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
@@ -1076,8 +1076,8 @@ pin-i2s0 {
 		};
 	};
 
-	i2s1_pins_a: i2s1-default {
-		pin-i2s1 {
+	i2s1_pins_a: i2s1-default-pins {
+		pins-i2s1 {
 			pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
 				 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
 				 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
@@ -1088,7 +1088,7 @@ pin-i2s1 {
 		};
 	};
 
-	key_pins_a: keys-alt {
+	key_pins_a: keys-alt-pins {
 		pins-keys {
 			pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
 				 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
@@ -1096,7 +1096,7 @@ pins-keys {
 		};
 	};
 
-	led_pins_a: leds-alt {
+	led_pins_a: leds-alt-pins {
 		pins-leds {
 			pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
 				 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
@@ -1104,7 +1104,7 @@ pins-leds {
 		};
 	};
 
-	mmc0_pins_default: mmc0default {
+	mmc0_pins_default: mmc0-default-pins {
 		pins-cmd-dat {
 			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
@@ -1130,7 +1130,7 @@ pins-rst {
 		};
 	};
 
-	mmc0_pins_uhs: mmc0 {
+	mmc0_pins_uhs: mmc0-uhs-pins {
 		pins-cmd-dat {
 			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
@@ -1158,7 +1158,7 @@ pins-rst {
 		};
 	};
 
-	mmc1_pins_default: mmc1default {
+	mmc1_pins_default: mmc1-default-pins {
 		pins-cmd-dat {
 			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
 				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
@@ -1188,7 +1188,7 @@ pins-insert {
 		};
 	};
 
-	mmc1_pins_uhs: mmc1 {
+	mmc1_pins_uhs: mmc1-uhs-pins {
 		pins-cmd-dat {
 			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
 				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
@@ -1207,7 +1207,7 @@ pins-clk {
 		};
 	};
 
-	nand_pins_default: nanddefault {
+	nand_pins_default: nand-default-pins {
 		pins-ale {
 			pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
 			drive-strength = <8>;
@@ -1236,15 +1236,15 @@ pins-we {
 		};
 	};
 
-	pcie_default: pcie_pin_default {
-		pins_cmd_dat {
+	pcie_default: pcie-default-pins {
+		pins-cmd-dat {
 			pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
 				 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
 			bias-disable;
 		};
 	};
 
-	pwm_pins_a: pwm-default {
+	pwm_pins_a: pwm-default-pins {
 		pins-pwm {
 			pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
 				 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
@@ -1254,7 +1254,7 @@ pins-pwm {
 		};
 	};
 
-	spi0_pins_a: spi0-default {
+	spi0_pins_a: spi0-default-pins {
 		pins-spi {
 			pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
 				<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
@@ -1264,7 +1264,7 @@ pins-spi {
 		};
 	};
 
-	spi1_pins_a: spi1-default {
+	spi1_pins_a: spi1-default-pins {
 		pins-spi {
 			pinmux = <MT7623_PIN_7_SPI1_CSN_FUNC_SPI1_CS>,
 				<MT7623_PIN_199_SPI1_CK_FUNC_SPI1_CK>,
@@ -1273,7 +1273,7 @@ pins-spi {
 		};
 	};
 
-	spi2_pins_a: spi2-default {
+	spi2_pins_a: spi2-default-pins {
 		pins-spi {
 			pinmux = <MT7623_PIN_101_SPI2_CSN_FUNC_SPI2_CS>,
 				 <MT7623_PIN_104_SPI2_CK_FUNC_SPI2_CK>,
@@ -1282,28 +1282,28 @@ pins-spi {
 		};
 	};
 
-	uart0_pins_a: uart0-default {
+	uart0_pins_a: uart0-default-pins {
 		pins-dat {
 			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
 				 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
 		};
 	};
 
-	uart1_pins_a: uart1-default {
+	uart1_pins_a: uart1-default-pins {
 		pins-dat {
 			pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
 				 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
 		};
 	};
 
-	uart2_pins_a: uart2-default {
+	uart2_pins_a: uart2-default-pins {
 		pins-dat {
 			pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
 				 <MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
 		};
 	};
 
-	uart2_pins_b: uart2-alt {
+	uart2_pins_b: uart2-alt-pins {
 		pins-dat {
 			pinmux = <MT7623_PIN_200_URXD2_FUNC_URXD2>,
 				 <MT7623_PIN_201_UTXD2_FUNC_UTXD2>;

-- 
2.43.0

[PATCH v2 2/3] arm: dts: mediatek: mt7623: fix pinctrl controller node name

[David Lechner]

Correct the pinctrl controller node name to use the same address as the
reg property.

Signed-off-by: David Lechner <dlechner@baylibre.com>
---
 arch/arm/boot/dts/mediatek/mt7623.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/mediatek/mt7623.dtsi b/arch/arm/boot/dts/mediatek/mt7623.dtsi
index f34f60cde594..aa42377b47da 100644
--- a/arch/arm/boot/dts/mediatek/mt7623.dtsi
+++ b/arch/arm/boot/dts/mediatek/mt7623.dtsi
@@ -249,7 +249,7 @@ pericfg: syscon@10003000 {
 		#reset-cells = <1>;
 	};
 
-	pio: pinctrl@10005000 {
+	pio: pinctrl@1000b000 {
 		compatible = "mediatek,mt7623-pinctrl";
 		reg = <0 0x1000b000 0 0x1000>;
 		mediatek,pctl-regmap = <&syscfg_pctl_a>;

-- 
2.43.0

[PATCH v2 3/3] arm: dts: mediatek: mt8135: fix pinctrl node name

[David Lechner]

Correct the pinctrl node name to use the same address as the reg
property.

Signed-off-by: David Lechner <dlechner@baylibre.com>
---
 arch/arm/boot/dts/mediatek/mt8135.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/mediatek/mt8135.dtsi b/arch/arm/boot/dts/mediatek/mt8135.dtsi
index 0f291ad22d3a..b03bd980ec37 100644
--- a/arch/arm/boot/dts/mediatek/mt8135.dtsi
+++ b/arch/arm/boot/dts/mediatek/mt8135.dtsi
@@ -148,7 +148,7 @@ pericfg: pericfg@10003000 {
 		 * Pinctrl access register at 0x10005000 and 0x1020c000 through
 		 * regmap. Register 0x1000b000 is used by EINT.
 		 */
-		pio: pinctrl@10005000 {
+		pio: pinctrl@1000b000 {
 			compatible = "mediatek,mt8135-pinctrl";
 			reg = <0 0x1000b000 0 0x1000>;
 			mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;

-- 
2.43.0

Re: [PATCH v2 0/3] arm: dts: mediatek: fix pinctl node names

[AngeloGioacchino Del Regno]

On Thu, 05 Mar 2026 15:03:15 -0600, David Lechner wrote:
> While passing by, I noticed that the pinctrl nodes in a couple of dtsi
> files did not match the addresses in their reg properties. Here are some
> patches to fix that.
> 
> 

Applied to v7.1-next/dts32, thanks!

[1/3] arm: dts: mediatek: mt7623: fix pinctrl child node names
      commit: 23d304b97e8e20b8d786b82b4d56257dde95139c
[2/3] arm: dts: mediatek: mt7623: fix pinctrl controller node name
      commit: 85fdc6458535d234e54d0968cc816dec9003d341
[3/3] arm: dts: mediatek: mt8135: fix pinctrl node name
      commit: ba6afff1d9b70028a5fc3df2d3acbee501c20a53

Cheers,
Angelo