From: Jason-JH Lin <jason-jh.lin@mediatek.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: devicetree@vger.kernel.org, Moudy Ho <moudy.ho@mediatek.com>,
Xiandong Wang <xiandong.wang@mediatek.com>,
Jason-JH Lin <jason-jh.lin@mediatek.com>,
Singo Chang <singo.chang@mediatek.com>,
Chen-yu Tsai <wenst@chromium.org>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Paul-PL Chen <paul-pl.chen@mediatek.com>,
Xavier Chang <xavier.chang@mediatek.com>,
Nancy Lin <nancy.lin@mediatek.com>,
linux-mediatek@lists.infradead.org,
Sirius Wang <sirius.wang@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-media@vger.kernel.org
Subject: [PATCH RESEND v5 15/20] soc: mediatek: mtk-cmdq: Add new APIs to replace cmdq_pkt_write() and cmdq_pkt_write_mask()
Date: Mon, 12 May 2025 17:19:37 +0800 [thread overview]
Message-ID: <20250512092252.905629-16-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20250512092252.905629-1-jason-jh.lin@mediatek.com>
To support generating GCE write instructions using both pa_base and
subsys, the original cmdq_pkt_write() and cmdq_pkt_write_mask() have
been expanded into four new APIs:
- Replaced cmdq_pkt_write() to cmdq_pkt_write_pa() and
cmdq_pkt_write_subsys().
- Replaced cmdq_pkt_write_mask() to cmdq_pkt_write_mask_pa() and
cmdq_pkt_write_mask_subsys().
The original cmdq_pkt_write() and cmdq_pkt_write_mask() will be removed
after all CMDQ users have migrated to the new APIs.
Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 41 +++++++++++++
include/linux/soc/mediatek/mtk-cmdq.h | 79 ++++++++++++++++++++++++++
2 files changed, 120 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index bae6753bd4a7..fd978fbd684b 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -213,6 +213,26 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value)
}
EXPORT_SYMBOL(cmdq_pkt_write);
+int cmdq_pkt_write_pa(struct cmdq_pkt *pkt, u8 subsys /*unused*/, u32 pa_base,
+ u16 offset, u32 value)
+{
+ int err;
+
+ err = cmdq_pkt_assign(pkt, CMDQ_THR_SPR_IDX0, CMDQ_ADDR_HIGH(pa_base));
+ if (err < 0)
+ return err;
+
+ return cmdq_pkt_write_s_value(pkt, CMDQ_THR_SPR_IDX0, CMDQ_ADDR_LOW(offset), value);
+}
+EXPORT_SYMBOL(cmdq_pkt_write_pa);
+
+int cmdq_pkt_write_subsys(struct cmdq_pkt *pkt, u8 subsys, u32 pa_base /*unused*/,
+ u16 offset, u32 value)
+{
+ return cmdq_pkt_write(pkt, subsys, offset, value);
+}
+EXPORT_SYMBOL(cmdq_pkt_write_subsys);
+
int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask)
{
@@ -230,6 +250,27 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
}
EXPORT_SYMBOL(cmdq_pkt_write_mask);
+int cmdq_pkt_write_mask_pa(struct cmdq_pkt *pkt, u8 subsys /*unused*/, u32 pa_base,
+ u16 offset, u32 value, u32 mask)
+{
+ int err;
+
+ err = cmdq_pkt_assign(pkt, CMDQ_THR_SPR_IDX0, CMDQ_ADDR_HIGH(pa_base));
+ if (err < 0)
+ return err;
+
+ return cmdq_pkt_write_s_mask_value(pkt, CMDQ_THR_SPR_IDX0,
+ CMDQ_ADDR_LOW(offset), value, mask);
+}
+EXPORT_SYMBOL(cmdq_pkt_write_mask_pa);
+
+int cmdq_pkt_write_mask_subsys(struct cmdq_pkt *pkt, u8 subsys, u32 pa_base /*unused*/,
+ u16 offset, u32 value, u32 mask)
+{
+ return cmdq_pkt_write_mask(pkt, subsys, offset, value, mask);
+}
+EXPORT_SYMBOL(cmdq_pkt_write_mask_subsys);
+
int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low,
u16 reg_idx)
{
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index f9a48262cb95..4a2acceb8581 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -124,6 +124,32 @@ void cmdq_pkt_destroy(struct cmdq_client *client, struct cmdq_pkt *pkt);
*/
int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
+/**
+ * cmdq_pkt_write_pa() - append write command to the CMDQ packet with pa_base
+ * @pkt: the CMDQ packet
+ * @subsys: unused parameter
+ * @pa_base: the physical address base of the hardware register
+ * @offset: register offset from CMDQ sub system
+ * @value: the specified target register value
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_write_pa(struct cmdq_pkt *pkt, u8 subsys /*unused*/,
+ u32 pa_base, u16 offset, u32 value);
+
+/**
+ * cmdq_pkt_write_subsys() - append write command to the CMDQ packet with subsys
+ * @pkt: the CMDQ packet
+ * @subsys: the CMDQ sub system code
+ * @pa_base: unused parameter
+ * @offset: register offset from CMDQ sub system
+ * @value: the specified target register value
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_write_subsys(struct cmdq_pkt *pkt, u8 subsys,
+ u32 pa_base /*unused*/, u16 offset, u32 value);
+
/**
* cmdq_pkt_write_mask() - append write command with mask to the CMDQ packet
* @pkt: the CMDQ packet
@@ -137,6 +163,34 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask);
+/**
+ * cmdq_pkt_write_mask_pa() - append write command with mask to the CMDQ packet with pa
+ * @pkt: the CMDQ packet
+ * @subsys: unused parameter
+ * @pa_base: the physical address base of the hardware register
+ * @offset: register offset from CMDQ sub system
+ * @value: the specified target register value
+ * @mask: the specified target register mask
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_write_mask_pa(struct cmdq_pkt *pkt, u8 subsys /*unused*/,
+ u32 pa_base, u16 offset, u32 value, u32 mask);
+
+/**
+ * cmdq_pkt_write_mask_subsys() - append write command with mask to the CMDQ packet with subsys
+ * @pkt: the CMDQ packet
+ * @subsys: the CMDQ sub system code
+ * @pa_base: unused parameter
+ * @offset: register offset from CMDQ sub system
+ * @value: the specified target register value
+ * @mask: the specified target register mask
+ *
+ * Return: 0 for success; else the error code is returned
+ */
+int cmdq_pkt_write_mask_subsys(struct cmdq_pkt *pkt, u8 subsys,
+ u32 pa_base /*unused*/, u16 offset, u32 value, u32 mask);
+
/*
* cmdq_pkt_read_s() - append read_s command to the CMDQ packet
* @pkt: the CMDQ packet
@@ -411,12 +465,37 @@ static inline int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u3
return -ENOENT;
}
+static inline int cmdq_pkt_write_pa(struct cmdq_pkt *pkt, u8 subsys /*unused*/,
+ u32 pa_base, u16 offset, u32 value)
+{
+ return -ENOENT;
+}
+
+static inline int cmdq_pkt_write_subsys(struct cmdq_pkt *pkt, u8 subsys,
+ u32 pa_base /*unused*/, u16 offset, u32 value)
+{
+ return -ENOENT;
+}
+
static inline int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
u16 offset, u32 value, u32 mask)
{
return -ENOENT;
}
+static inline int cmdq_pkt_write_mask_pa(struct cmdq_pkt *pkt, u8 subsys /*unused*/,
+ u32 pa_base, u16 offset, u32 value, u32 mask)
+{
+ return -ENOENT;
+}
+
+static inline int cmdq_pkt_write_mask_subsys(struct cmdq_pkt *pkt, u8 subsys,
+ u32 pa_base /*unused*/, u16 offset,
+ u32 value, u32 mask)
+{
+ return -ENOENT;
+}
+
static inline int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
u16 addr_low, u16 reg_idx)
{
--
2.43.0
next prev parent reply other threads:[~2025-05-12 9:53 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-12 9:19 [PATCH RESEND v5 00/20] Add GCE support for MT8196 Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 01/20] arm64: dts: mediatek: Add GCE header " Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 02/20] mailbox: mtk-cmdq: Refine DMA address handling for the command buffer Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 03/20] mailbox: mtk-cmdq: Add cmdq private data to cmdq_pkt for generating instruction Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 04/20] soc: mediatek: mtk-cmdq: Add cmdq_get_mbox_priv() in cmdq_pkt_create() Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 05/20] soc: mediatek: mtk-cmdq: Add cmdq_pkt_jump_rel_temp() for removing shift_pa Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 06/20] media: platform: mtk-mdp3: Change cmdq_pkt_jump_rel() to cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 07/20] soc: mediatek: mtk-cmdq: Remove shift_pa parameter from cmdq_pkt_jump() Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 08/20] media: platform: mtk-mdp3: Use cmdq_pkt_jump_rel() without shift_pa Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 09/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_jump() and cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 10/20] mailbox: mtk-cmdq: Remove unsued cmdq_get_shift_pa() Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 11/20] mailbox: mtk-cmdq: Add GCE hardware virtualization configuration Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 12/20] mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 13/20] mailbox: mtk-cmdq: Add driver data to support for MT8196 Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 14/20] soc: mediatek: mtk-cmdq: Add pa_base parsing for hardware without subsys ID support Jason-JH Lin
2025-05-12 9:19 ` Jason-JH Lin [this message]
2025-05-12 9:19 ` [PATCH RESEND v5 16/20] soc: mediatek: mtk-cmdq: Add mminfra_offset adjustment for DRAM addresses Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 17/20] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 18/20] drm/mediatek: " Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 19/20] media: mediatek: mdp3: " Jason-JH Lin
2025-05-12 9:19 ` [PATCH RESEND v5 20/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin
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