Linux-mediatek Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Jason-JH Lin <jason-jh.lin@mediatek.com>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: devicetree@vger.kernel.org, Moudy Ho <moudy.ho@mediatek.com>,
	Xiandong Wang <xiandong.wang@mediatek.com>,
	Jason-JH Lin <jason-jh.lin@mediatek.com>,
	Singo Chang <singo.chang@mediatek.com>,
	Chen-yu Tsai <wenst@chromium.org>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	Paul-PL Chen <paul-pl.chen@mediatek.com>,
	Xavier Chang <xavier.chang@mediatek.com>,
	Nancy Lin <nancy.lin@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Sirius Wang <sirius.wang@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-media@vger.kernel.org
Subject: [PATCH RESEND v5 16/20] soc: mediatek: mtk-cmdq: Add mminfra_offset adjustment for DRAM addresses
Date: Mon, 12 May 2025 17:19:38 +0800	[thread overview]
Message-ID: <20250512092252.905629-17-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20250512092252.905629-1-jason-jh.lin@mediatek.com>

Since GCE has been moved to MMINFRA in MT8196, all transactions from
MMINFRA to DRAM will have their addresses adjusted by subtracting a
mminfra_offset.

Therefore, the CMDQ helper driver needs to get the mminfra_offset value
of the SoC from cmdq_mbox_priv of cmdq_pkt and then add it to the DRAM
address when generating instructions to ensure GCE accesses the correct
DRAM address. CMDQ users can then call CMDQ helper APIs as usual.

Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
---
 drivers/soc/mediatek/mtk-cmdq-helper.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index fd978fbd684b..0a718ffa5f3b 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -358,6 +358,7 @@ int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_
 	int ret;
 
 	/* read the value of src_addr into high_addr_reg_idx */
+	src_addr += pkt->priv.mminfra_offset;
 	ret = cmdq_pkt_assign(pkt, high_addr_reg_idx, CMDQ_ADDR_HIGH(src_addr));
 	if (ret < 0)
 		return ret;
@@ -366,6 +367,7 @@ int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_
 		return ret;
 
 	/* write the value of value_reg_idx into dst_addr */
+	dst_addr += pkt->priv.mminfra_offset;
 	ret = cmdq_pkt_assign(pkt, high_addr_reg_idx, CMDQ_ADDR_HIGH(dst_addr));
 	if (ret < 0)
 		return ret;
@@ -491,7 +493,7 @@ int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mas
 	inst.op = CMDQ_CODE_MASK;
 	inst.dst_t = CMDQ_REG_TYPE;
 	inst.sop = CMDQ_POLL_ADDR_GPR;
-	inst.value = addr;
+	inst.value = addr + pkt->priv.mminfra_offset;
 	ret = cmdq_pkt_append_command(pkt, inst);
 	if (ret < 0)
 		return ret;
@@ -551,7 +553,7 @@ int cmdq_pkt_jump_abs(struct cmdq_pkt *pkt, dma_addr_t addr)
 	struct cmdq_instruction inst = {
 		.op = CMDQ_CODE_JUMP,
 		.offset = CMDQ_JUMP_ABSOLUTE,
-		.value = addr >> pkt->priv.shift_pa
+		.value = (addr +  pkt->priv.mminfra_offset) >> pkt->priv.shift_pa
 	};
 	return cmdq_pkt_append_command(pkt, inst);
 }
-- 
2.43.0



  parent reply	other threads:[~2025-05-12  9:51 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12  9:19 [PATCH RESEND v5 00/20] Add GCE support for MT8196 Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 01/20] arm64: dts: mediatek: Add GCE header " Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 02/20] mailbox: mtk-cmdq: Refine DMA address handling for the command buffer Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 03/20] mailbox: mtk-cmdq: Add cmdq private data to cmdq_pkt for generating instruction Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 04/20] soc: mediatek: mtk-cmdq: Add cmdq_get_mbox_priv() in cmdq_pkt_create() Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 05/20] soc: mediatek: mtk-cmdq: Add cmdq_pkt_jump_rel_temp() for removing shift_pa Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 06/20] media: platform: mtk-mdp3: Change cmdq_pkt_jump_rel() to cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 07/20] soc: mediatek: mtk-cmdq: Remove shift_pa parameter from cmdq_pkt_jump() Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 08/20] media: platform: mtk-mdp3: Use cmdq_pkt_jump_rel() without shift_pa Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 09/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_jump() and cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 10/20] mailbox: mtk-cmdq: Remove unsued cmdq_get_shift_pa() Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 11/20] mailbox: mtk-cmdq: Add GCE hardware virtualization configuration Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 12/20] mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 13/20] mailbox: mtk-cmdq: Add driver data to support for MT8196 Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 14/20] soc: mediatek: mtk-cmdq: Add pa_base parsing for hardware without subsys ID support Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 15/20] soc: mediatek: mtk-cmdq: Add new APIs to replace cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin
2025-05-12  9:19 ` Jason-JH Lin [this message]
2025-05-12  9:19 ` [PATCH RESEND v5 17/20] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 18/20] drm/mediatek: " Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 19/20] media: mediatek: mdp3: " Jason-JH Lin
2025-05-12  9:19 ` [PATCH RESEND v5 20/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250512092252.905629-17-jason-jh.lin@mediatek.com \
    --to=jason-jh.lin@mediatek.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=angelogioacchino.delregno@collabora.com \
    --cc=chunkuang.hu@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=jassisinghbrar@gmail.com \
    --cc=krzk+dt@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=mchehab@kernel.org \
    --cc=moudy.ho@mediatek.com \
    --cc=nancy.lin@mediatek.com \
    --cc=paul-pl.chen@mediatek.com \
    --cc=robh@kernel.org \
    --cc=singo.chang@mediatek.com \
    --cc=sirius.wang@mediatek.com \
    --cc=wenst@chromium.org \
    --cc=xavier.chang@mediatek.com \
    --cc=xiandong.wang@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox