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From: Jason-JH Lin <jason-jh.lin@mediatek.com>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: devicetree@vger.kernel.org, Moudy Ho <moudy.ho@mediatek.com>,
	Xiandong Wang <xiandong.wang@mediatek.com>,
	Jason-JH Lin <jason-jh.lin@mediatek.com>,
	Singo Chang <singo.chang@mediatek.com>,
	Chen-yu Tsai <wenst@chromium.org>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	Paul-PL Chen <paul-pl.chen@mediatek.com>,
	Xavier Chang <xavier.chang@mediatek.com>,
	Nancy Lin <nancy.lin@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	Sirius Wang <sirius.wang@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-media@vger.kernel.org
Subject: [PATCH v6 08/20] mailbox: mtk-cmdq: Add driver data to support for MT8196
Date: Mon, 2 Jun 2025 01:31:40 +0800	[thread overview]
Message-ID: <20250601173355.1731140-9-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20250601173355.1731140-1-jason-jh.lin@mediatek.com>

MT8196 has 2 new hardware configuration compared with the previous SoC,
which correspond to the 2 new driver data:

1. mminfra_offset: For GCE data path control
   Since GCE has been moved into mminfra, GCE needs to append the
   mminfra offset to the DRAM address when accessing the DRAM.

2. gce_vm: For GCE hardware virtualization control
   Currently, the first version of the mt8196 mailbox controller only
   requires setting the VM-related registers to enable the permissions
   of a host VM.

Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 6f4b9879069e..85211b80ccdb 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/sizes.h>
 #include <linux/mailbox_controller.h>
 #include <linux/mailbox/mtk-cmdq-mailbox.h>
 #include <linux/of.h>
@@ -852,6 +853,16 @@ static const struct gce_plat gce_plat_mt8195 = {
 	.gce_num = 2
 };
 
+static const struct gce_plat gce_plat_mt8196 = {
+	.thread_nr = 32,
+	.shift = 3,
+	.mminfra_offset = SZ_2G,
+	.control_by_sw = true,
+	.sw_ddr_en = true,
+	.gce_vm = true,
+	.gce_num = 2
+};
+
 static const struct of_device_id cmdq_of_ids[] = {
 	{.compatible = "mediatek,mt6779-gce", .data = (void *)&gce_plat_mt6779},
 	{.compatible = "mediatek,mt8173-gce", .data = (void *)&gce_plat_mt8173},
@@ -860,6 +871,7 @@ static const struct of_device_id cmdq_of_ids[] = {
 	{.compatible = "mediatek,mt8188-gce", .data = (void *)&gce_plat_mt8188},
 	{.compatible = "mediatek,mt8192-gce", .data = (void *)&gce_plat_mt8192},
 	{.compatible = "mediatek,mt8195-gce", .data = (void *)&gce_plat_mt8195},
+	{.compatible = "mediatek,mt8196-gce", .data = (void *)&gce_plat_mt8196},
 	{}
 };
 MODULE_DEVICE_TABLE(of, cmdq_of_ids);
-- 
2.43.0



  parent reply	other threads:[~2025-06-01 18:14 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-01 17:31 [PATCH v6 00/20] Add GCE support for MT8196 Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 01/20] arm64: dts: mediatek: Add GCE header " Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 02/20] mailbox: mtk-cmdq: Refine DMA address handling for the command buffer Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 03/20] mailbox: mtk-cmdq: Add cmdq private data to cmdq_pkt for generating instruction Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 04/20] soc: mediatek: mtk-cmdq: Add cmdq_get_mbox_priv() in cmdq_pkt_create() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 05/20] soc: mediatek: mtk-cmdq: Add cmdq_pkt_jump_rel_temp() for removing shift_pa Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 06/20] mailbox: mtk-cmdq: Add GCE hardware virtualization configuration Jason-JH Lin
2025-06-27  8:41   ` CK Hu (胡俊光)
2025-07-01  5:50     ` Jason-JH Lin (林睿祥)
2025-06-01 17:31 ` [PATCH v6 07/20] mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction Jason-JH Lin
2025-06-27  9:49   ` CK Hu (胡俊光)
2025-07-01  6:15     ` Jason-JH Lin (林睿祥)
2025-06-01 17:31 ` Jason-JH Lin [this message]
2025-06-27 10:07   ` [PATCH v6 08/20] mailbox: mtk-cmdq: Add driver data to support for MT8196 CK Hu (胡俊光)
2025-06-01 17:31 ` [PATCH v6 09/20] soc: mediatek: mtk-cmdq: Add pa_base parsing for hardware without subsys ID support Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 10/20] soc: mediatek: mtk-cmdq: Add new APIs to replace cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 11/20] soc: mediatek: mtk-cmdq: Add mminfra_offset adjustment for DRAM addresses Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 12/20] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 13/20] drm/mediatek: " Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 14/20] media: platform: mtk-mdp3: " Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 15/20] media: platform: mtk-mdp3: Change cmdq_pkt_jump_rel() to cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 16/20] soc: mediatek: mtk-cmdq: Remove shift_pa parameter from cmdq_pkt_jump() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 17/20] media: platform: mtk-mdp3: Use cmdq_pkt_jump_rel() without shift_pa Jason-JH Lin
2025-06-02 15:37   ` Nicolas Dufresne
2025-06-03 15:18     ` Jason-JH Lin (林睿祥)
2025-06-01 17:31 ` [PATCH v6 18/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_jump() and cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 19/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 20/20] mailbox: mtk-cmdq: Remove unsued cmdq_get_shift_pa() Jason-JH Lin

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