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From: "Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>
To: "chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>,
	"mchehab@kernel.org" <mchehab@kernel.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"CK Hu (胡俊光)" <ck.hu@mediatek.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Moudy Ho (何宗原)" <Moudy.Ho@mediatek.com>,
	"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"wenst@chromium.org" <wenst@chromium.org>,
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	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>,
	"Xavier Chang (張獻文)" <Xavier.Chang@mediatek.com>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-media@vger.kernel.org" <linux-media@vger.kernel.org>
Subject: Re: [PATCH v6 06/20] mailbox: mtk-cmdq: Add GCE hardware virtualization configuration
Date: Tue, 1 Jul 2025 05:50:46 +0000	[thread overview]
Message-ID: <23b7cc9681b69946562be50079ece0c6bd6308ff.camel@mediatek.com> (raw)
In-Reply-To: <f12d0d954bea2b89d6f316db6b9bbfeea6b4db8e.camel@mediatek.com>

On Fri, 2025-06-27 at 08:41 +0000, CK Hu (胡俊光) wrote:
> On Mon, 2025-06-02 at 01:31 +0800, Jason-JH Lin wrote:
> > The GCE hardware virtualization configuration supports the
> > isolation of
> > GCE hardware resources across different OS environments. Each OS is
> > treated as a virtual machine (VM) for GCE purposes.
> > There are 6 VMs and 1 host VM. The host VM has main control over
> > the
> > GCE virtualization settings for all VMs.
> > 
> > To properly access the GCE thread registers, it is necessary to
> > configure access permissions for specific GCE threads assigned to
> > different VMs.
> > Currently, since only the host VM is being used, it is required to
> > enable access permissions for all GCE threads for the host VM.
> > 
> > There are 2 VM configurations:
> > 1. VM_ID_MAP
> > There are 4 registers to allocate 32 GCE threads across different
> > VMs:
> > VM_ID_MAP0 for threads 0-9, VM_ID_MAP1 for threads 10-19,
> > VM_ID_MAP2 for threads 20-29, and VM_ID_MAP3 for threads 30-31.
> > Each thread has a 3-bit configuration, where setting all bits to 1
> > configures the thread for the host VM.
> > 
> > 2. VM_CPR_GSIZE
> > It is used to allocate the CPR SRAM size to each VM. Each VM has 4-
> > bit
> > configuration, where setting bit 0-3 to configures the size of host
> > VM.
> > This setting must be configured before the VM configuration to
> > prevent
> > resource leakage.
> > 
> > Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
> > ---
> 
> [snip]
> 
> > +
> >  static void cmdq_gctl_value_toggle(struct cmdq *cmdq, bool
> > ddr_enable)
> >  {
> >  	u32 val = cmdq->pdata->control_by_sw ? GCE_CTRL_BY_SW : 0;
> > @@ -162,6 +211,7 @@ static void cmdq_init(struct cmdq *cmdq)
> >  
> >  	WARN_ON(clk_bulk_enable(cmdq->pdata->gce_num, cmdq-
> > >clocks));
> >  
> > +	cmdq_vm_toggle(cmdq, true);
> >  	cmdq_gctl_value_toggle(cmdq, true);
> >  
> >  	writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base +
> > CMDQ_THR_SLOT_CYCLES);
> > @@ -335,6 +385,7 @@ static int cmdq_runtime_resume(struct device
> > *dev)
> >  	if (ret)
> >  		return ret;
> >  
> > +	cmdq_vm_toggle(cmdq, true);
> >  	cmdq_gctl_value_toggle(cmdq, true);
> >  	return 0;
> >  }
> > @@ -344,6 +395,7 @@ static int cmdq_runtime_suspend(struct device
> > *dev)
> >  	struct cmdq *cmdq = dev_get_drvdata(dev);
> >  
> >  	cmdq_gctl_value_toggle(cmdq, false);
> > +	cmdq_vm_toggle(cmdq, false);
> 
> Why turn off permission when suspend?
> Why not always turn on permission?
> 

Yes, you're right!

VM permission settings should not be disabled or reset after boot up.
But we don't have the Hypervisor to keep the GCE HOST VM settings,
so we need to configure the VM setting again after cmdq_resume() to
avoid the GCE VM settings being cleared after cmdq_suspend().

I'll drop this VM setting here and rename the API as cmdq_vm_init()
without the disable VM settings flow.

Regards,
Jason-JH Lin

> Regards,
> CK
> 
> >  	clk_bulk_disable(cmdq->pdata->gce_num, cmdq->clocks);
> >  	return 0;
> >  }
> 


  reply	other threads:[~2025-07-01  5:53 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-01 17:31 [PATCH v6 00/20] Add GCE support for MT8196 Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 01/20] arm64: dts: mediatek: Add GCE header " Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 02/20] mailbox: mtk-cmdq: Refine DMA address handling for the command buffer Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 03/20] mailbox: mtk-cmdq: Add cmdq private data to cmdq_pkt for generating instruction Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 04/20] soc: mediatek: mtk-cmdq: Add cmdq_get_mbox_priv() in cmdq_pkt_create() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 05/20] soc: mediatek: mtk-cmdq: Add cmdq_pkt_jump_rel_temp() for removing shift_pa Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 06/20] mailbox: mtk-cmdq: Add GCE hardware virtualization configuration Jason-JH Lin
2025-06-27  8:41   ` CK Hu (胡俊光)
2025-07-01  5:50     ` Jason-JH Lin (林睿祥) [this message]
2025-06-01 17:31 ` [PATCH v6 07/20] mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction Jason-JH Lin
2025-06-27  9:49   ` CK Hu (胡俊光)
2025-07-01  6:15     ` Jason-JH Lin (林睿祥)
2025-06-01 17:31 ` [PATCH v6 08/20] mailbox: mtk-cmdq: Add driver data to support for MT8196 Jason-JH Lin
2025-06-27 10:07   ` CK Hu (胡俊光)
2025-06-01 17:31 ` [PATCH v6 09/20] soc: mediatek: mtk-cmdq: Add pa_base parsing for hardware without subsys ID support Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 10/20] soc: mediatek: mtk-cmdq: Add new APIs to replace cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 11/20] soc: mediatek: mtk-cmdq: Add mminfra_offset adjustment for DRAM addresses Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 12/20] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 13/20] drm/mediatek: " Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 14/20] media: platform: mtk-mdp3: " Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 15/20] media: platform: mtk-mdp3: Change cmdq_pkt_jump_rel() to cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 16/20] soc: mediatek: mtk-cmdq: Remove shift_pa parameter from cmdq_pkt_jump() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 17/20] media: platform: mtk-mdp3: Use cmdq_pkt_jump_rel() without shift_pa Jason-JH Lin
2025-06-02 15:37   ` Nicolas Dufresne
2025-06-03 15:18     ` Jason-JH Lin (林睿祥)
2025-06-01 17:31 ` [PATCH v6 18/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_jump() and cmdq_pkt_jump_rel_temp() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 19/20] soc: mediatek: mtk-cmdq: Remove cmdq_pkt_write() and cmdq_pkt_write_mask() Jason-JH Lin
2025-06-01 17:31 ` [PATCH v6 20/20] mailbox: mtk-cmdq: Remove unsued cmdq_get_shift_pa() Jason-JH Lin

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