Re: [PATCH 5/5] drm/mediatek: Change main display path to support PQ for MT8196

["CK Hu (胡俊光)" <ck.hu@mediatek.com>]

On Tue, 2025-02-11 at 10:52 +0800, Sunny Shen wrote:
> Due to the path mux design of the MT8196, the following components
> need to be added to support Picture Quality (PQ) in the main display
> path: CCORR0, CCORR1, DITHER0, GAMMA0, MDP_RSZ0, POSTMASK0, TDSHP0.

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> 
> Signed-off-by: Sunny Shen <sunny.shen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index b810a197f58b..1c97dc46ae70 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -242,6 +242,13 @@ static const unsigned int mt8196_mtk_ddp_ovl0_main[] = {
>  
>  static const unsigned int mt8196_mtk_ddp_disp0_main[] = {
>  	DDP_COMPONENT_DLI_ASYNC0,
> +	DDP_COMPONENT_MDP_RSZ0,
> +	DDP_COMPONENT_TDSHP0,
> +	DDP_COMPONENT_CCORR0,
> +	DDP_COMPONENT_CCORR1,
> +	DDP_COMPONENT_GAMMA0,
> +	DDP_COMPONENT_POSTMASK0,
> +	DDP_COMPONENT_DITHER0,
>  	DDP_COMPONENT_DLO_ASYNC1,
>  };
>