From: "Arınç ÜNAL" <arinc.unal@arinc9.com>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
Landen Chao <Landen.Chao@mediatek.com>,
Florian Fainelli <f.fainelli@gmail.com>,
netdev@vger.kernel.org, Sean Wang <sean.wang@mediatek.com>,
linux-kernel@vger.kernel.org, richard@routerhints.com,
DENG Qingfang <dqfext@gmail.com>,
Eric Dumazet <edumazet@google.com>,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
erkin.bozoglu@xeront.com, "David S. Miller" <davem@davemloft.net>,
linux-arm-kernel@lists.infradead.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Subject: Re: [PATCH net] net: dsa: mt7530: don't change PVC_EG_TAG when CPU port becomes VLAN-aware
Date: Mon, 6 Feb 2023 23:59:35 +0300 [thread overview]
Message-ID: <d160cc60-d62a-e1a9-5580-48a50a2568df@arinc9.com> (raw)
In-Reply-To: <20230206204228.sa45cvco6bltidwq@skbuf>
[-- Attachment #1: Type: text/plain, Size: 2056 bytes --]
On 6.02.2023 23:42, Vladimir Oltean wrote:
> On Mon, Feb 06, 2023 at 11:35:50PM +0300, Arınç ÜNAL wrote:
>> On 06/02/2023 23:33, Vladimir Oltean wrote:
>>> On Mon, Feb 06, 2023 at 10:41:47PM +0300, Arınç ÜNAL wrote:
>>>> One last thing. Specific to MT7530 switch in MT7621 SoC, if port@5 is the
>>>> only CPU port defined on the devicetree, frames sent from DSA master appears
>>>> malformed on the user port. Packet capture on computer connected to the user
>>>> port is attached.
>>>>
>>>> The ARP frames on the pcapng file are received on the DSA master, I captured
>>>> them with tcpdump, and put it in the attachments. Then I start pinging from
>>>> the DSA master and the malformed frames appear on the pcapng file.
>>>>
>>>> It'd be great if you could take a look this final issue.
>>>
>>> What phy-mode does port@5 use when it doesn't work? What about the DSA master?
>>
>> It's rgmii on port@5 and gmac1.
>
> What kind of RGMII? Plain "rgmii" on both ends, with no internal delays?
> With RGMII, somebody must add a skew to the clock signal relative to the
> data signals, so that setup/hold times at the other end are not violated.
> Either the transmitter or the receiver can add RGMII delays in each
> direction of communication, but someone must do it, and no more than one
> entity should do it.
>
> So my question would be: could you retry after replacing phy-mode = "rgmii"
> with phy-mode = "rgmii-id" on port@5? And if that doesn't change anything
> (unlikely but possible), also try "rgmii-txid" and "rgmii-rxid" in port@5?
> Don't change the phy-mode on gmac1.
Still getting malformed frames. Packet capture for each phy-mode is
attached. Made sure the phy-mode with:
# cat /proc/device-tree/ethernet@1e100000/mac@1/phy-mode
rgmii
# cat
/proc/device-tree/ethernet@1e100000/mdio-bus/switch@1f/ports/port@5/phy-mode
rgmii-id
# cat
/proc/device-tree/ethernet@1e100000/mdio-bus/switch@1f/ports/port@5/phy-mode
rgmii-txid
# cat
/proc/device-tree/ethernet@1e100000/mdio-bus/switch@1f/ports/port@5/phy-mode
rgmii-rxid
Arınç
[-- Attachment #2: rgmii-id.pcapng --]
[-- Type: application/x-pcapng, Size: 1192 bytes --]
[-- Attachment #3: rgmii-rxid.pcapng --]
[-- Type: application/x-pcapng, Size: 1148 bytes --]
[-- Attachment #4: rgmii-txid.pcapng --]
[-- Type: application/x-pcapng, Size: 1192 bytes --]
next prev parent reply other threads:[~2023-02-06 21:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-05 14:07 [PATCH net] net: dsa: mt7530: don't change PVC_EG_TAG when CPU port becomes VLAN-aware Vladimir Oltean
2023-02-05 19:25 ` Arınç ÜNAL
2023-02-05 20:39 ` Vladimir Oltean
2023-02-05 23:02 ` Arınç ÜNAL
2023-02-05 23:50 ` Vladimir Oltean
2023-02-06 7:35 ` Frank Wunderlich
2023-02-06 7:41 ` Arınç ÜNAL
2023-02-06 16:41 ` Arınç ÜNAL
2023-02-06 17:46 ` Vladimir Oltean
2023-02-06 18:41 ` Arınç ÜNAL
2023-02-06 19:41 ` Arınç ÜNAL
2023-02-06 20:33 ` Vladimir Oltean
2023-02-06 20:35 ` Arınç ÜNAL
2023-02-06 20:42 ` Vladimir Oltean
2023-02-06 20:59 ` Arınç ÜNAL [this message]
2023-02-07 10:56 ` Paolo Abeni
2023-02-07 12:39 ` Vladimir Oltean
2023-02-07 18:07 ` Paolo Abeni
2023-02-08 20:14 ` Vladimir Oltean
2023-02-06 18:05 ` Florian Fainelli
2023-02-07 11:00 ` patchwork-bot+netdevbpf
2023-02-11 18:04 ` Frank Wunderlich
2023-02-11 18:31 ` Vladimir Oltean
2023-02-11 19:02 ` Richard van Schagen
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