From: "Kevin D. Kissell" <KevinK@mips.com>
To: "John Miller" <jamiller1110@cox.net>, <linux-mips@linux-mips.org>
Subject: Re: Instruction error with cache opcode
Date: Sun, 14 May 2006 16:17:14 +0200 [thread overview]
Message-ID: <002a01c67761$253e97f0$0202a8c0@Ulysses> (raw)
In-Reply-To: 446735C6.2080306@mountolympos.net
> I am attempting to write a routine to initialize the cache for a MIPS
> 4kc core to get Linux 2.6.16.14 to compile. I am sure someone has
> probably already done this, but I am doing it for educational reasons.
> I am receiving the following error:
>
> arch/mips/kernel/head.S: Assembler messages:
> arch/mips/kernel/head.S:131: Error: Instruction cache requires absolute
> expression
>
> From the following code section:
>
> li t0, 0x80000000 # start address (KSEG0)
> addu t1,t0,0x2000 # 8KB I-cache
> 1: addu t0,0x10 # 16B line size
> cache Index_Store_Tag_I,-4(t0) # clear tag
> nop
> cache Fill_I,-4(t0) # fill line
> nop
> bne t0,t1,1b
> cache Index_Store_Tag_I,-4(t0)
>
> I copied the code section from See MIPS Run, so I know the code must be
> correct. What am I doing wrong?
Where and how is the value of Index_Store_Tag_I defined?
Regards,
Kevin K.
WARNING: multiple messages have this Message-ID (diff)
From: "Kevin D. Kissell" <KevinK@mips.com>
To: John Miller <jamiller1110@cox.net>, linux-mips@linux-mips.org
Subject: Re: Instruction error with cache opcode
Date: Sun, 14 May 2006 16:17:14 +0200 [thread overview]
Message-ID: <002a01c67761$253e97f0$0202a8c0@Ulysses> (raw)
Message-ID: <20060514141714.gKqFyj8BoYLbmZzsCB3EUkuBEJSXWDb1B9EDkz9cEhU@z> (raw)
In-Reply-To: 446735C6.2080306@mountolympos.net
> I am attempting to write a routine to initialize the cache for a MIPS
> 4kc core to get Linux 2.6.16.14 to compile. I am sure someone has
> probably already done this, but I am doing it for educational reasons.
> I am receiving the following error:
>
> arch/mips/kernel/head.S: Assembler messages:
> arch/mips/kernel/head.S:131: Error: Instruction cache requires absolute
> expression
>
> From the following code section:
>
> li t0, 0x80000000 # start address (KSEG0)
> addu t1,t0,0x2000 # 8KB I-cache
> 1: addu t0,0x10 # 16B line size
> cache Index_Store_Tag_I,-4(t0) # clear tag
> nop
> cache Fill_I,-4(t0) # fill line
> nop
> bne t0,t1,1b
> cache Index_Store_Tag_I,-4(t0)
>
> I copied the code section from See MIPS Run, so I know the code must be
> correct. What am I doing wrong?
Where and how is the value of Index_Store_Tag_I defined?
Regards,
Kevin K.
next prev parent reply other threads:[~2006-05-14 14:24 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-14 13:51 Instruction error with cache opcode John Miller
2006-05-14 13:51 ` John Miller
2006-05-14 14:17 ` Kevin D. Kissell [this message]
2006-05-14 14:17 ` Kevin D. Kissell
2006-05-14 18:39 ` John Miller
2006-05-14 19:42 ` Kevin D. Kissell
2006-05-14 19:42 ` Kevin D. Kissell
2006-05-14 20:14 ` John Miller
2006-05-14 23:29 ` Thiemo Seufer
2006-05-15 1:06 ` Atsushi Nemoto
2006-05-15 1:35 ` John Miller
2006-05-15 1:38 ` John Miller
2006-05-15 1:38 ` John Miller
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