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From: "Kevin D. Kissell" <kevink@mips.com>
To: "Jun Sun" <jsun@mvista.com>, "Ralf Baechle" <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>, <jsun@mvista.com>
Subject: Re: [RFC] synchronized CPU count registers on SMP machines
Date: Thu, 5 Jun 2003 10:55:10 +0200	[thread overview]
Message-ID: <019201c32b40$2d54cf60$10eca8c0@grendel> (raw)
In-Reply-To: 20030604164652.J19122@mvista.com

----- Original Message ----- 
From: "Jun Sun" <jsun@mvista.com>
> On Thu, Jun 05, 2003 at 01:15:47AM +0200, Ralf Baechle wrote:
> > On Wed, Jun 04, 2003 at 03:39:30PM -0700, Jun Sun wrote:
> > 
> > > 1) clocks on different CPUs don't have the same frequency
> > > 2) clocks on different CPUs drift to each other
> > > 2) some fancy power saving feature such as frequency scaling
> > > 
> > > But I think for a foreseeable future most MIPS SMP machines
> > > don't have the above issues (true?).  And it is probably worthwile
> > > to synchronize count registers for them.
> > 
> > 1) and 2) affect most SGI systems.
> >
> 
> Assuming SGI systems represent the past of MIPS, we are still ok
> future-wise. :)

I personally think it would be foolish to assume that future MIPS 
MP systems will not be subject to one or more such constraint.

            Kevin K.

WARNING: multiple messages have this Message-ID (diff)
From: "Kevin D. Kissell" <kevink@mips.com>
To: Jun Sun <jsun@mvista.com>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Subject: Re: [RFC] synchronized CPU count registers on SMP machines
Date: Thu, 5 Jun 2003 10:55:10 +0200	[thread overview]
Message-ID: <019201c32b40$2d54cf60$10eca8c0@grendel> (raw)
Message-ID: <20030605085510.mkOgBHeayCj8dMIpPxZW9t9gsw3qrSoGTbfwZNDKR8o@z> (raw)
In-Reply-To: 20030604164652.J19122@mvista.com

----- Original Message ----- 
From: "Jun Sun" <jsun@mvista.com>
> On Thu, Jun 05, 2003 at 01:15:47AM +0200, Ralf Baechle wrote:
> > On Wed, Jun 04, 2003 at 03:39:30PM -0700, Jun Sun wrote:
> > 
> > > 1) clocks on different CPUs don't have the same frequency
> > > 2) clocks on different CPUs drift to each other
> > > 2) some fancy power saving feature such as frequency scaling
> > > 
> > > But I think for a foreseeable future most MIPS SMP machines
> > > don't have the above issues (true?).  And it is probably worthwile
> > > to synchronize count registers for them.
> > 
> > 1) and 2) affect most SGI systems.
> >
> 
> Assuming SGI systems represent the past of MIPS, we are still ok
> future-wise. :)

I personally think it would be foolish to assume that future MIPS 
MP systems will not be subject to one or more such constraint.

            Kevin K.

  parent reply	other threads:[~2003-06-05  8:46 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-06-04 22:39 [RFC] synchronized CPU count registers on SMP machines Jun Sun
2003-06-04 22:51 ` Michael Uhler
2003-06-04 22:51   ` Michael Uhler
2003-06-04 23:44   ` Jun Sun
2003-06-04 23:15 ` Ralf Baechle
2003-06-04 23:46   ` Jun Sun
2003-06-05  0:12     ` Ralf Baechle
2003-06-05  1:38       ` Jun Sun
2003-06-05  8:09         ` Dominic Sweetman
2003-06-05  8:48           ` Ralf Baechle
2003-06-05 16:53             ` Jun Sun
2003-06-05 20:06               ` Greg Lindahl
2003-06-05 10:45       ` Alan Cox
2003-06-05  8:55     ` Kevin D. Kissell [this message]
2003-06-05  8:51       ` Ralf Baechle
2003-06-05  8:55       ` Kevin D. Kissell
2003-06-05 11:08       ` Maciej W. Rozycki
2003-06-05  0:18 ` Keith Owens
     [not found] <ralf@linux-mips.org>
2003-06-05  9:23 ` Tor Arntsen

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