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From: "Bradley D. LaRonde" <brad@laronde.org>
To: <linux-mips@linux-mips.org>
Subject: inconsistent operand constraints in 'asm' in unaligned.h:66 using gcc 3.4
Date: Thu, 22 Apr 2004 23:22:40 -0400	[thread overview]
Message-ID: <06d601c428e2$3ba1dcc0$8d01010a@prefect> (raw)

gcc 3.4 complians about:

include/asm/unaligned.h:66: error: inconsistent operand constraints in an
`asm'

from linux CVS 2.4 branch.  That's:

/*
 * Store doubleword ununaligned.
 */
static inline void __stq_u(unsigned long __val, unsigned long long * __addr)
{
        __asm__("usw\t%1, %0\n\t"
                "usw\t%D1, 4+%0"
                : "=m" (*__addr)
                : "r" (__val));
}

I was baffled by the "%D1" syntax until Thiemo Seufer pointed out that %D1
assembled to "one register higher than the register chosen for %1".
Ooooookay.  But gcc complains about a constraint problem.  Maybe "r" and
"%Dn" don't get along (long)?

Anyway... what about __val's type?  I would expect that to be "unsigned long
long" for -mabi=32.  Otherwise will "%D" get what the asm author expected?
If I do change it to "unsigned long long" then I get two of the constraint
errors.  Ooooookay.  Anyone got a constraint that means "consecutive
register pair"?

I finally decided to punt and write:

static inline void __stq_u(unsigned long long __val, unsigned long long *
__addr)
{
        *__addr = __val;
}

Is this OK?  Is there a better solution?


Regards,
Brad

WARNING: multiple messages have this Message-ID (diff)
From: "Bradley D. LaRonde" <brad@laronde.org>
To: linux-mips@linux-mips.org
Subject: inconsistent operand constraints in 'asm' in unaligned.h:66 using gcc 3.4
Date: Thu, 22 Apr 2004 23:22:40 -0400	[thread overview]
Message-ID: <06d601c428e2$3ba1dcc0$8d01010a@prefect> (raw)
Message-ID: <20040423032240.64daGxwZeO9dl3CGFlWlNXew1HyfjWLES7wuNs4JtGU@z> (raw)

gcc 3.4 complians about:

include/asm/unaligned.h:66: error: inconsistent operand constraints in an
`asm'

from linux CVS 2.4 branch.  That's:

/*
 * Store doubleword ununaligned.
 */
static inline void __stq_u(unsigned long __val, unsigned long long * __addr)
{
        __asm__("usw\t%1, %0\n\t"
                "usw\t%D1, 4+%0"
                : "=m" (*__addr)
                : "r" (__val));
}

I was baffled by the "%D1" syntax until Thiemo Seufer pointed out that %D1
assembled to "one register higher than the register chosen for %1".
Ooooookay.  But gcc complains about a constraint problem.  Maybe "r" and
"%Dn" don't get along (long)?

Anyway... what about __val's type?  I would expect that to be "unsigned long
long" for -mabi=32.  Otherwise will "%D" get what the asm author expected?
If I do change it to "unsigned long long" then I get two of the constraint
errors.  Ooooookay.  Anyone got a constraint that means "consecutive
register pair"?

I finally decided to punt and write:

static inline void __stq_u(unsigned long long __val, unsigned long long *
__addr)
{
        *__addr = __val;
}

Is this OK?  Is there a better solution?


Regards,
Brad

             reply	other threads:[~2004-04-23  3:22 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-04-23  3:22 Bradley D. LaRonde [this message]
2004-04-23  3:22 ` inconsistent operand constraints in 'asm' in unaligned.h:66 using gcc 3.4 Bradley D. LaRonde
2004-04-23 13:07 ` Maciej W. Rozycki
2004-04-23 13:14   ` Ralf Baechle
2004-06-15 13:57     ` Maciej W. Rozycki

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