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From: Binbin Zhou <zhoubb@lemote.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: John Crispin <john@phrozen.org>,
	"Steven J. Hill" <Steven.Hill@imgtec.com>,
	linux-mips@linux-mips.org, Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>,
	Kelvin Cheung <keguang.zhang@gmail.com>,
	Binbin Zhou <zhoubb@lemote.com>, Chunbo Cui <cuicb@lemote.com>,
	Huacai Chen <chenhc@lemote.com>
Subject: [PATCH v2 2/8] MIPS: Loongson: Add Loongson-1A Kconfig options
Date: Wed, 17 Jun 2015 18:32:40 +0800	[thread overview]
Message-ID: <1434537166-5385-3-git-send-email-zhoubb@lemote.com> (raw)
In-Reply-To: <1434537166-5385-1-git-send-email-zhoubb@lemote.com>

Added Kconfig options include: Loongson-1A CPU and machine definition,
CPU cache features, 32-bit kernel and early printk support.

Signed-off-by: Chunbo Cui <cuicb@lemote.com>
Signed-off-by: Binbin Zhou <zhoubb@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/Kconfig            | 11 +++++++++++
 arch/mips/loongson32/Kconfig | 20 ++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cf09f42..0918915 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1327,6 +1327,14 @@ config CPU_LOONGSON2F
 	  have a similar programming interface with FPGA northbridge used in
 	  Loongson2E.
 
+config CPU_LOONGSON1A
+	bool "Loongson 1A"
+	depends on SYS_HAS_CPU_LOONGSON1A
+	select CPU_LOONGSON1
+	help
+	  The Loongson 1A is a 32-bit SoC, which implements the MIPS32
+	  release 2 instruction set.
+
 config CPU_LOONGSON1B
 	bool "Loongson 1B"
 	depends on SYS_HAS_CPU_LOONGSON1B
@@ -1770,6 +1778,9 @@ config SYS_HAS_CPU_LOONGSON2F
 	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
 	select CPU_SUPPORTS_UNCACHED_ACCELERATED
 
+config SYS_HAS_CPU_LOONGSON1A
+	bool
+
 config SYS_HAS_CPU_LOONGSON1B
 	bool
 
diff --git a/arch/mips/loongson32/Kconfig b/arch/mips/loongson32/Kconfig
index 7704f20..741867c 100644
--- a/arch/mips/loongson32/Kconfig
+++ b/arch/mips/loongson32/Kconfig
@@ -1,8 +1,28 @@
 if MACH_LOONGSON32
 
+config ZONE_DMA
+	prompt "Zone DMA"
+	bool
+
 choice
 	prompt "Machine Type"
 
+config LOONGSON1_LS1A
+	bool "Loongson LS1A board"
+	select CEVT_R4K
+	select CSRC_R4K
+	select SYS_HAS_CPU_LOONGSON1A
+	select DMA_NONCOHERENT
+	select BOOT_ELF32
+	select IRQ_MIPS_CPU
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select SYS_SUPPORTS_HIGHMEM
+	select SYS_SUPPORTS_MIPS16
+	select SYS_HAS_EARLY_PRINTK
+	select USE_GENERIC_EARLY_PRINTK_8250
+	select COMMON_CLK
+
 config LOONGSON1_LS1B
 	bool "Loongson LS1B board"
 	select CEVT_R4K if !MIPS_EXTERNAL_TIMER
-- 
1.9.0

  parent reply	other threads:[~2015-06-17 10:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-17 10:32 [PATCH v2 0/8] MIPS: Loongson: Add the Loongson-1A processor support Binbin Zhou
2015-06-17 10:32 ` [PATCH v2 1/8] MIPS: Loongson: Add basic Loongson-1A CPU support Binbin Zhou
2015-06-17 10:32 ` Binbin Zhou [this message]
2015-06-17 10:32 ` [PATCH v2 3/8] MIPS: Loongson: Add platform devices for Loongson-1A/1B Binbin Zhou
2015-08-03 15:21   ` Ralf Baechle
2015-08-04  3:15     ` Huacai Chen
2015-06-17 10:32 ` [PATCH v2 4/8] MIPS: Loongson: Add loongson-1A board support Binbin Zhou
2015-06-17 10:32 ` [PATCH v2 5/8] MIPS: Loongson-1A: Workaround for pll register can't be read Binbin Zhou
2015-06-17 10:32 ` [PATCH v2 6/8] MIPS: Loongson-1A: Add IRQ type setting support Binbin Zhou
2015-06-17 10:32 ` [PATCH v2 7/8] MIPS: Loongson-1A: Enable SPARSEMEN and HIGHMEM Binbin Zhou
2015-06-17 10:32 ` [PATCH v2 8/8] MIPS: Loongson: Add a Loongson-1A default config file Binbin Zhou

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