* Question concerning Assembler error
@ 2001-03-08 16:20 Jeff Harrell
2001-03-08 16:30 ` H.Heinold
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Jeff Harrell @ 2001-03-08 16:20 UTC (permalink / raw)
To: linux-mips
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I am getting a strange error from the assembler that I am not quite sure
what to make of it. Here
is the Error and code snippet:
>make
mipsel-linux-gcc -D_ASSEMBLER_ -mcpu=r4600 -mips2 -Wall
-Wstrict-prototypes -O2 -fomit-frame-pointer -G -0
-mno-abicalls -fno-pic -pipe -mlong-calls -Wimplicit -c
avreset.S
avreset.S: Assembler messages:
avreset.S:262: Error: Rest of line ignored. First ignored
character is `0'.
avreset.S:1006: Error: Rest of line ignored. First ignored
character is `0'.
gmake: *** [avreset.o] Error 1
gmake: Target `all' not remade because of errors.
And here is the code that seems to be causing the problem:
/* Interrupt : For now we simply disable interrupts and
return */
MFC0( k0, C0_STATUS)
srl k0, 1
sll k0, 1
MTC0( k0, C0_STATUS)
nop
.set mips3
==> eret <==
.set mips2
nop
Any information that anyone might have would be greatly appreciated.
Regards,
Jeff Harrell
--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jeff Harrell Work: (801) 619-6104
Broadband Access group/TI
jharrell@ti.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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^ permalink raw reply [flat|nested] 10+ messages in thread* Re: Question concerning Assembler error 2001-03-08 16:20 Question concerning Assembler error Jeff Harrell @ 2001-03-08 16:30 ` H.Heinold 2001-03-08 16:40 ` Ralf Baechle 2001-03-08 16:37 ` Ralf Baechle 2001-03-08 16:43 ` mips gcc 2.95.2 and 2.91.66 bug Fabrice Bellard 2 siblings, 1 reply; 10+ messages in thread From: H.Heinold @ 2001-03-08 16:30 UTC (permalink / raw) To: linux-mips On Thu, Mar 08, 2001 at 09:20:15AM -0700, Jeff Harrell wrote: > I am getting a strange error from the assembler that I am not quite sure > what to make of it. Here > is the Error and code snippet: > > > >make > mipsel-linux-gcc -D_ASSEMBLER_ -mcpu=r4600 -mips2 -Wall > -Wstrict-prototypes -O2 -fomit-frame-pointer -G -0 > -mno-abicalls -fno-pic -pipe -mlong-calls -Wimplicit -c Hm sorry cant help with the assembler problem, but which machine has a 4600 Prozessor and run mipsel on it? -- Henning Heinold ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: Question concerning Assembler error 2001-03-08 16:30 ` H.Heinold @ 2001-03-08 16:40 ` Ralf Baechle 2001-03-08 16:54 ` Kevin D. Kissell 0 siblings, 1 reply; 10+ messages in thread From: Ralf Baechle @ 2001-03-08 16:40 UTC (permalink / raw) To: heinold, linux-mips On Thu, Mar 08, 2001 at 05:30:03PM +0100, H.Heinold wrote: > Hm sorry cant help with the assembler problem, but which machine > has a 4600 Prozessor and run mipsel on it? RM200C. Ralf ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: Question concerning Assembler error 2001-03-08 16:40 ` Ralf Baechle @ 2001-03-08 16:54 ` Kevin D. Kissell 2001-03-08 16:54 ` Kevin D. Kissell 2001-03-09 0:18 ` Ralf Baechle 0 siblings, 2 replies; 10+ messages in thread From: Kevin D. Kissell @ 2001-03-08 16:54 UTC (permalink / raw) To: Ralf Baechle, heinold, linux-mips > > Hm sorry cant help with the assembler problem, but which machine > > has a 4600 Prozessor and run mipsel on it? > > RM200C. Actually, It's far more likely that Jeff is working with a MIPS 4KC or 5KC CPU core. -mcpu=r4600 ends up being the closest fit to the MIPS32 ISA and pipeline among the options available for the Linux-capable gcc compilers. Kevin K. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: Question concerning Assembler error 2001-03-08 16:54 ` Kevin D. Kissell @ 2001-03-08 16:54 ` Kevin D. Kissell 2001-03-09 0:18 ` Ralf Baechle 1 sibling, 0 replies; 10+ messages in thread From: Kevin D. Kissell @ 2001-03-08 16:54 UTC (permalink / raw) To: Ralf Baechle, heinold, linux-mips > > Hm sorry cant help with the assembler problem, but which machine > > has a 4600 Prozessor and run mipsel on it? > > RM200C. Actually, It's far more likely that Jeff is working with a MIPS 4KC or 5KC CPU core. -mcpu=r4600 ends up being the closest fit to the MIPS32 ISA and pipeline among the options available for the Linux-capable gcc compilers. Kevin K. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: Question concerning Assembler error 2001-03-08 16:54 ` Kevin D. Kissell 2001-03-08 16:54 ` Kevin D. Kissell @ 2001-03-09 0:18 ` Ralf Baechle 2001-03-09 0:18 ` Ralf Baechle 1 sibling, 1 reply; 10+ messages in thread From: Ralf Baechle @ 2001-03-09 0:18 UTC (permalink / raw) To: Kevin D. Kissell; +Cc: heinold, linux-mips On Thu, Mar 08, 2001 at 05:54:29PM +0100, Kevin D. Kissell wrote: > > > Hm sorry cant help with the assembler problem, but which machine > > > has a 4600 Prozessor and run mipsel on it? > > > > RM200C. > > Actually, It's far more likely that Jeff is working with a > MIPS 4KC or 5KC CPU core. -mcpu=r4600 ends up > being the closest fit to the MIPS32 ISA and pipeline > among the options available for the Linux-capable > gcc compilers. Maybe your answer is right, but then the question is wrong :-) Ralf ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: Question concerning Assembler error 2001-03-09 0:18 ` Ralf Baechle @ 2001-03-09 0:18 ` Ralf Baechle 0 siblings, 0 replies; 10+ messages in thread From: Ralf Baechle @ 2001-03-09 0:18 UTC (permalink / raw) To: Kevin D. Kissell; +Cc: heinold, linux-mips On Thu, Mar 08, 2001 at 05:54:29PM +0100, Kevin D. Kissell wrote: > > > Hm sorry cant help with the assembler problem, but which machine > > > has a 4600 Prozessor and run mipsel on it? > > > > RM200C. > > Actually, It's far more likely that Jeff is working with a > MIPS 4KC or 5KC CPU core. -mcpu=r4600 ends up > being the closest fit to the MIPS32 ISA and pipeline > among the options available for the Linux-capable > gcc compilers. Maybe your answer is right, but then the question is wrong :-) Ralf ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: Question concerning Assembler error 2001-03-08 16:20 Question concerning Assembler error Jeff Harrell 2001-03-08 16:30 ` H.Heinold @ 2001-03-08 16:37 ` Ralf Baechle 2001-03-08 16:43 ` mips gcc 2.95.2 and 2.91.66 bug Fabrice Bellard 2 siblings, 0 replies; 10+ messages in thread From: Ralf Baechle @ 2001-03-08 16:37 UTC (permalink / raw) To: Jeff Harrell; +Cc: linux-mips On Thu, Mar 08, 2001 at 09:20:15AM -0700, Jeff Harrell wrote: > /* Interrupt : For now we simply disable interrupts and > return */ > > MFC0( k0, C0_STATUS) > srl k0, 1 > sll k0, 1 > MTC0( k0, C0_STATUS) > nop > .set mips3 > ==> eret <== > .set mips2 > nop > > > Any information that anyone might have would be greatly appreciated. I suggest to run this code through the preprocessor only using the -E -C options. The output will be somewhat cryptic but explain much better what's wrong. Ralf ^ permalink raw reply [flat|nested] 10+ messages in thread
* mips gcc 2.95.2 and 2.91.66 bug 2001-03-08 16:20 Question concerning Assembler error Jeff Harrell 2001-03-08 16:30 ` H.Heinold 2001-03-08 16:37 ` Ralf Baechle @ 2001-03-08 16:43 ` Fabrice Bellard 2001-03-09 2:28 ` Hiroyuki Machida 2 siblings, 1 reply; 10+ messages in thread From: Fabrice Bellard @ 2001-03-08 16:43 UTC (permalink / raw) To: linux-mips Hi! Maybe this bug can interest you: when using byte swaping in le16_to_cpu for example, mips gcc 2.95.2 and 2.91.66 sometime do not generate correct code : the u16 to u32 convertion is missing. I found this bug while compiling drivers/mtd/ftl.c in build_maps(). Here is a sample source to reproduce the bug: typedef unsigned short __u16; extern __inline__ __const__ __u16 le16_to_cpu(__u16 x) { return ((__u16)( \ (((__u16)(x) & (__u16)0x00ffU) << 8) | \ (((__u16)(x) & (__u16)0xff00U) >> 8) )); } int test(int xtrans, int xvalid, __u16 *ptr) { if ((xvalid+xtrans != le16_to_cpu(*ptr))) { return -1; } return 0; } The generated asm is : test: .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, extra= 0 .mask 0x00000000,0 .fmask 0x00000000,0 .set noreorder .cpload $25 .set reorder lhu $3,0($7) addu $5,$6,$5 sll $4,$3,8 srl $3,$3,8 or $4,$4,$3 .set noreorder .set nomacro bne $5,$4,$L7 li $2,-1 # 0xffffffff .set macro .set reorder move $2,$0 $L7: j $31 .end test The andi op is missing. egcs-1.0.3 seems to be OK. I have no experience in submitting gcc bugs, so if someone could forward this mail to the relevant gcc mailing list... Fabrice. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: mips gcc 2.95.2 and 2.91.66 bug 2001-03-08 16:43 ` mips gcc 2.95.2 and 2.91.66 bug Fabrice Bellard @ 2001-03-09 2:28 ` Hiroyuki Machida 0 siblings, 0 replies; 10+ messages in thread From: Hiroyuki Machida @ 2001-03-09 2:28 UTC (permalink / raw) To: bellard; +Cc: linux-mips From: Fabrice Bellard <bellard@email.enst.fr> Subject: mips gcc 2.95.2 and 2.91.66 bug Date: Thu, 8 Mar 2001 17:43:31 +0100 (MET) > Hi! > > Maybe this bug can interest you: when using byte swaping in le16_to_cpu > for example, mips gcc 2.95.2 and 2.91.66 sometime do not generate correct > code : the u16 to u32 convertion is missing. I found this bug while > compiling drivers/mtd/ftl.c in build_maps(). Here is a sample source to > reproduce the bug: This bug is fixed by following chage in GCC 3.0. gcc/gcc/ChangeLog.3: 2000-04-24 Hiroyuki Machida <machida@sm.sony.co.jp> * combine.c (try_combine): Update reg_nonzero_bits of newi2pat before newpat. Please refer mail archives at gcc.gnu.org for details. You can easily apply this fix to gcc-2.95.x. --- Hiroyuki Machida Creative Station SCE Inc. ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2001-03-09 2:28 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2001-03-08 16:20 Question concerning Assembler error Jeff Harrell 2001-03-08 16:30 ` H.Heinold 2001-03-08 16:40 ` Ralf Baechle 2001-03-08 16:54 ` Kevin D. Kissell 2001-03-08 16:54 ` Kevin D. Kissell 2001-03-09 0:18 ` Ralf Baechle 2001-03-09 0:18 ` Ralf Baechle 2001-03-08 16:37 ` Ralf Baechle 2001-03-08 16:43 ` mips gcc 2.95.2 and 2.91.66 bug Fabrice Bellard 2001-03-09 2:28 ` Hiroyuki Machida
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