From: "H . J . Lu" <hjl@lucon.org>
To: Zhang Fuxin <fxzhang@ict.ac.cn>
Cc: "linux-mips@oss.sgi.com" <linux-mips@oss.sgi.com>
Subject: Re: SNaN & QNaN on mips
Date: Sun, 3 Feb 2002 22:54:54 -0800 [thread overview]
Message-ID: <20020203225454.A5158@lucon.org> (raw)
In-Reply-To: <200202040746.g147k0A23002@oss.sgi.com>; from fxzhang@ict.ac.cn on Mon, Feb 04, 2002 at 02:22:48PM +0800
On Mon, Feb 04, 2002 at 02:22:48PM +0800, Zhang Fuxin wrote:
> hi,
>
> Gcc (2.96 20000731,H.J.LU's rh port for mips) think 0x7fc00000 is QNaN and
> optimize 0.0/0.0 as 0x7fc00000 for single precision ops,while for my cpu
> (maybe most mips cpu) is a SNaN. R4k user's manual and "See Mips Run" both
> say so.And experiments confirm this.
>
> Should we correct it?
Yes. Do you have a patch?
Thanks.
H.J.
next prev parent reply other threads:[~2002-02-04 7:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-02-04 6:22 SNaN & QNaN on mips Zhang Fuxin
2002-02-04 6:54 ` H . J . Lu [this message]
2002-02-04 6:59 ` Kjeld Borch Egevang
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