Linux MIPS Architecture development
 help / color / mirror / Atom feed
* SNaN & QNaN on mips
@ 2002-02-04  6:22 Zhang Fuxin
  2002-02-04  6:54 ` H . J . Lu
  2002-02-04  6:59 ` Kjeld Borch Egevang
  0 siblings, 2 replies; 3+ messages in thread
From: Zhang Fuxin @ 2002-02-04  6:22 UTC (permalink / raw)
  To: linux-mips@oss.sgi.com

hi,

Gcc (2.96 20000731,H.J.LU's rh port for mips) think 0x7fc00000 is QNaN and 
optimize 0.0/0.0 as 0x7fc00000 for single precision ops,while for my cpu
(maybe most mips cpu) is a SNaN. R4k user's manual and "See Mips Run" both
 say so.And experiments confirm this.

Should we correct it?

>
>Regards
>            Zhang Fuxin
>            fxzhang@ict.ac.cn

Regards
            Zhang Fuxin
            fxzhang@ict.ac.cn

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: SNaN & QNaN on mips
  2002-02-04  6:22 SNaN & QNaN on mips Zhang Fuxin
@ 2002-02-04  6:54 ` H . J . Lu
  2002-02-04  6:59 ` Kjeld Borch Egevang
  1 sibling, 0 replies; 3+ messages in thread
From: H . J . Lu @ 2002-02-04  6:54 UTC (permalink / raw)
  To: Zhang Fuxin; +Cc: linux-mips@oss.sgi.com

On Mon, Feb 04, 2002 at 02:22:48PM +0800, Zhang Fuxin wrote:
> hi,
> 
> Gcc (2.96 20000731,H.J.LU's rh port for mips) think 0x7fc00000 is QNaN and 
> optimize 0.0/0.0 as 0x7fc00000 for single precision ops,while for my cpu
> (maybe most mips cpu) is a SNaN. R4k user's manual and "See Mips Run" both
>  say so.And experiments confirm this.
> 
> Should we correct it?

Yes. Do you have a patch?

Thanks.


H.J.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: SNaN & QNaN on mips
  2002-02-04  6:22 SNaN & QNaN on mips Zhang Fuxin
  2002-02-04  6:54 ` H . J . Lu
@ 2002-02-04  6:59 ` Kjeld Borch Egevang
  1 sibling, 0 replies; 3+ messages in thread
From: Kjeld Borch Egevang @ 2002-02-04  6:59 UTC (permalink / raw)
  To: Zhang Fuxin; +Cc: linux-mips@oss.sgi.com

On Mon, 4 Feb 2002, Zhang Fuxin wrote:

> hi,
> 
> Gcc (2.96 20000731,H.J.LU's rh port for mips) think 0x7fc00000 is QNaN and 
> optimize 0.0/0.0 as 0x7fc00000 for single precision ops,while for my cpu
> (maybe most mips cpu) is a SNaN. R4k user's manual and "See Mips Run" both
>  say so.And experiments confirm this.

MIPS interprets Signalling NaN's different than e.g. Intel. According to 
IEEE754 it _is_ a matter of interpretation. 0x7fc00000 is an SNaN while 
0x7fbfffff is an QNaN. It would be great if you could fix it.

/Kjeld

> Should we correct it?
> 
> >
> >Regards
> >            Zhang Fuxin
> >            fxzhang@ict.ac.cn
> 
> Regards
>             Zhang Fuxin
>             fxzhang@ict.ac.cn
> 

-- 
_    _ ____  ___                       Mailto:kjelde@mips.com
|\  /|||___)(___    MIPS Denmark       Direct: +45 44 86 55 85
| \/ |||    ____)   Lautrupvang 4 B    Switch: +45 44 86 55 55
  TECHNOLOGIES      DK-2750 Ballerup   Fax...: +45 44 86 55 56
                    Denmark            http://www.mips.com/

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2002-02-04  8:00 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2002-02-04  6:22 SNaN & QNaN on mips Zhang Fuxin
2002-02-04  6:54 ` H . J . Lu
2002-02-04  6:59 ` Kjeld Borch Egevang

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox