[PATCH] r4k icache flushing for mips64 CVS HEAD

[PATCH] r4k icache flushing for mips64 CVS HEAD

[Vivien Chappelier]

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Hi,

	This fixes icache flushing for the r4xx0 processor in the current
(CVS HEAD) 2.5.1 tree. The flush_cache_all function does nothing there,
that's why I moved it to flush_cache_l1.

Vivien.

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diff -Naur /share/linux.cvs/arch/mips64/mm/loadmmu.c linux.patched/arch/mips64/mm/loadmmu.c
--- /share/linux.cvs/arch/mips64/mm/loadmmu.c	Sun Mar  3 19:50:39 2002
+++ linux.patched/arch/mips64/mm/loadmmu.c	Thu May 16 23:12:21 2002
@@ -30,11 +30,14 @@
 void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
 void (*_flush_page_to_ram)(struct page * page);
 
+void (*_flush_icache_range)(unsigned long start, unsigned long end);
+void (*_flush_icache_page)(struct vm_area_struct *vma, struct page *page);
+void (*_flush_icache_all)(void);
+
 /* MIPS specific cache operations */
 void (*_flush_cache_sigtramp)(unsigned long addr);
 void (*_flush_cache_l2)(void);
 void (*_flush_cache_l1)(void);
-
 
 /* DMA cache operations. */
 void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
diff -Naur /share/linux.cvs/include/asm-mips64/pgtable.h linux.patched/include/asm-mips64/pgtable.h
--- /share/linux.cvs/include/asm-mips64/pgtable.h	Sun May  5 15:03:39 2002
+++ linux.patched/include/asm-mips64/pgtable.h	Thu May 16 23:01:46 2002
@@ -60,12 +60,22 @@
 
 #else
 
+extern void (*_flush_icache_all)(void);
+extern void (*_flush_icache_range)(unsigned long start, unsigned long end);
+extern void (*_flush_icache_page)(struct vm_area_struct *vma, struct page *page);
+
 #define flush_cache_mm(mm)		_flush_cache_mm(mm)
 #define flush_cache_range(mm,start,end)	_flush_cache_range(mm,start,end)
 #define flush_cache_page(vma,page)	_flush_cache_page(vma, page)
 #define flush_page_to_ram(page)		_flush_page_to_ram(page)
 #define flush_icache_range(start, end)	_flush_icache_range(start, end)
 #define flush_icache_page(vma, page)	_flush_icache_page(vma, page)
+#ifdef CONFIG_VTAG_ICACHE
+#define flush_icache_all()		_flush_icache_all()
+#else
+#define flush_icache_all()		do { } while(0)
+#endif
+
 
 #endif /* !CONFIG_CPU_R10000 */
 
diff -Naur linux/arch/mips64/mm/r4xx0.c linux.patch/arch/mips64/mm/r4xx0.c
--- linux/arch/mips64/mm/r4xx0.c	Mon Jul  1 21:36:37 2002
+++ linux.patch/arch/mips64/mm/r4xx0.c	Mon Jul  1 22:22:15 2002
@@ -1625,7 +1625,7 @@
 static void
 r4k_flush_icache_range(unsigned long start, unsigned long end)
 {
-	flush_cache_all();
+	flush_cache_l1();
 }
 
 static void

Re: [PATCH] r4k icache flushing for mips64 CVS HEAD

[Ralf Baechle]

On Mon, Jul 01, 2002 at 10:46:49PM +0200, Vivien Chappelier wrote:

> 	This fixes icache flushing for the r4xx0 processor in the current
> (CVS HEAD) 2.5.1 tree. The flush_cache_all function does nothing there,
> that's why I moved it to flush_cache_l1.

Not right, I checked in a variation of it ...

  Ralf

[PATCH] Re: [PATCH] r4k icache flushing for mips64 CVS HEAD

[Vivien Chappelier]

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On Tue, 2 Jul 2002, Ralf Baechle wrote:

> > 	This fixes icache flushing for the r4xx0 processor in the current
> > (CVS HEAD) 2.5.1 tree. The flush_cache_all function does nothing there,
> > that's why I moved it to flush_cache_l1.
> 
> Not right, I checked in a variation of it ...

Ok, but you forgot some things. The following patch adds the declaration
of _flush_cache_all in loadmmu.c and pgtables.h

I guess 3 patches is enough for today ;) More coming later ;)

regards,
Vivien.

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diff -Naur linux/include/asm-mips64/pgtable.h linux.patch/include/asm-mips64/pgtable.h
--- linux/include/asm-mips64/pgtable.h	Thu Jul  4 10:12:56 2002
+++ linux.patch/include/asm-mips64/pgtable.h	Thu Jul  4 11:17:23 2002
@@ -27,6 +27,7 @@
  *  - flush_cache_range(mm, start, end) flushes a range of pages
  *  - flush_page_to_ram(page) write back kernel page to ram
  */
+extern void (*_flush_cache_all)(void);
 extern void (*_flush_cache_mm)(struct mm_struct *mm);
 extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
                                  unsigned long end);
diff -Naur linux/arch/mips64/mm/loadmmu.c linux.patch/arch/mips64/mm/loadmmu.c
--- linux/arch/mips64/mm/loadmmu.c	Thu Jul  4 10:12:28 2002
+++ linux.patch/arch/mips64/mm/loadmmu.c	Thu Jul  4 11:32:45 2002
@@ -24,6 +24,7 @@
 void (*_copy_page)(void * to, void * from);
 
 /* Cache operations. */
+void (*_flush_cache_all)(void);
 void (*_flush_cache_mm)(struct mm_struct *mm);
 void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
                            unsigned long end);

Re: [PATCH] Re: [PATCH] r4k icache flushing for mips64 CVS HEAD

[Ralf Baechle]

On Thu, Jul 04, 2002 at 01:33:15PM +0200, Vivien Chappelier wrote:

> > > 	This fixes icache flushing for the r4xx0 processor in the current
> > > (CVS HEAD) 2.5.1 tree. The flush_cache_all function does nothing there,
> > > that's why I moved it to flush_cache_l1.
> > 
> > Not right, I checked in a variation of it ...
> 
> Ok, but you forgot some things. The following patch adds the declaration
> of _flush_cache_all in loadmmu.c and pgtables.h
> 
> I guess 3 patches is enough for today ;) More coming later ;)

Looks right, applied to 2.5 only.

  Ralf