memory for exception vectors

memory for exception vectors

[Ladislav Michl]

Could anyone tell me where is space for exception vectors reserved? Many boards
(for example Alchemy Pb1000, Galileo EV96100 or Galileo EV64120A) simply
registers all available RAM with add_memory_region call, but I didn't find code
which reserves first 0x200 (on most CPUs) for exceptions vectors anywhere. I'd
guess there is something obvious what I'm missing. Can you help me to see it?

Thanks,
	ladis

Re: memory for exception vectors

[Jun Sun]

On Mon, May 12, 2003 at 11:56:41AM +0100, Ladislav Michl wrote:
> Could anyone tell me where is space for exception vectors reserved? Many boards
> (for example Alchemy Pb1000, Galileo EV96100 or Galileo EV64120A) simply
> registers all available RAM with add_memory_region call, but I didn't find code
> which reserves first 0x200 (on most CPUs) for exceptions vectors anywhere. I'd
> guess there is something obvious what I'm missing. Can you help me to see it?
>

Kernel only uses memory after the end of kernel image.  In that sense, all
memory before LOADADDR (see arch/mips/Makefile) is reserved.

Jun

Re: memory for exception vectors

[Ladislav Michl]

On Mon, May 12, 2003 at 10:44:08AM -0700, Jun Sun wrote:
> On Mon, May 12, 2003 at 11:56:41AM +0100, Ladislav Michl wrote:
> > Could anyone tell me where is space for exception vectors reserved? Many boards
> > (for example Alchemy Pb1000, Galileo EV96100 or Galileo EV64120A) simply
> > registers all available RAM with add_memory_region call, but I didn't find code
> > which reserves first 0x200 (on most CPUs) for exceptions vectors anywhere. I'd
> > guess there is something obvious what I'm missing. Can you help me to see it?
> 
> Kernel only uses memory after the end of kernel image.  In that sense, all
> memory before LOADADDR (see arch/mips/Makefile) is reserved.

I'm afraid, I didn't find any code which does what you're describing here.
But in arch/mips/mm/init.c is function setup_zero_pages which allocates
first (or first eight if CPU has VCE) page(s). Does it do the trick?

	ladis

Re: memory for exception vectors

[Jun Sun]

On Tue, May 13, 2003 at 10:51:45AM +0100, Ladislav Michl wrote:
> On Mon, May 12, 2003 at 10:44:08AM -0700, Jun Sun wrote:
> > On Mon, May 12, 2003 at 11:56:41AM +0100, Ladislav Michl wrote:
> > > Could anyone tell me where is space for exception vectors reserved? Many boards
> > > (for example Alchemy Pb1000, Galileo EV96100 or Galileo EV64120A) simply
> > > registers all available RAM with add_memory_region call, but I didn't find code
> > > which reserves first 0x200 (on most CPUs) for exceptions vectors anywhere. I'd
> > > guess there is something obvious what I'm missing. Can you help me to see it?
> > 
> > Kernel only uses memory after the end of kernel image.  In that sense, all
> > memory before LOADADDR (see arch/mips/Makefile) is reserved.
> 
> I'm afraid, I didn't find any code which does what you're describing here.
> But in arch/mips/mm/init.c is function setup_zero_pages which allocates
> first (or first eight if CPU has VCE) page(s). Does it do the trick?
>

Now you are really pushing me. :)

I figured that out a while back.  I think you can find answers in
arch/mips/kernel/setup.c, 

	start_pfn = PFN_UP(__pa(&_end));

I think zero pages are allocated so that all future read-only zero-filled
pages can be mapped to them.  They are allocated at the beginning of
start_pfn, which is also after kernel image.

Jun 

Re: memory for exception vectors

[Ladislav Michl]

On Tue, May 13, 2003 at 09:52:44AM -0700, Jun Sun wrote:
[snip]
> I figured that out a while back.  I think you can find answers in
> arch/mips/kernel/setup.c, 
> 
> 	start_pfn = PFN_UP(__pa(&_end));

Strange I read that file many times, but for yet unknown reason never noticed
__pa(&_end). That's what I call selective blindness :)

> I think zero pages are allocated so that all future read-only zero-filled
> pages can be mapped to them.  They are allocated at the beginning of
> start_pfn, which is also after kernel image.

Thanks a lot for explanation, now I'm sure that MC based memory probing for
IP22 will not break anything. Patch will come tomorrow.

	Ladis