* low ram as source of good parity data..?
@ 2003-06-05 9:46 Ashish anand
2003-06-05 11:27 ` Ralf Baechle
0 siblings, 1 reply; 2+ messages in thread
From: Ashish anand @ 2003-06-05 9:46 UTC (permalink / raw)
To: linux-mips
Hello,
I have seen it a common practice to assume low RAM as source
of good parity data and use it to fill the caches with good parity
data in firmware during elementary hardware initialisation process.
why it is always safe to assume that low RAM contains good parity data .?
Is it always true..?
this question came in picture after I got cacheparity error sometimes.
Best Regards,
Ashish Anand
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: low ram as source of good parity data..?
2003-06-05 9:46 low ram as source of good parity data..? Ashish anand
@ 2003-06-05 11:27 ` Ralf Baechle
0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2003-06-05 11:27 UTC (permalink / raw)
To: Ashish anand; +Cc: linux-mips
On Thu, Jun 05, 2003 at 03:16:41PM +0530, Ashish anand wrote:
> I have seen it a common practice to assume low RAM as source
> of good parity data and use it to fill the caches with good parity
> data in firmware during elementary hardware initialisation process.
>
> why it is always safe to assume that low RAM contains good parity data .?
> Is it always true..?
> this question came in picture after I got cacheparity error sometimes.
For the general case it's not safe. Some systems need memory to be
initialized by writing to it first because before the parity or ECC
bits may have an undefined state.
The safe way to initalize the caches is using the Index_Store_Tag_D etc.
cacheops but of course that requires knowledge about the particular
processor's exactly cache architecture.
Ralf
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2003-06-05 9:46 low ram as source of good parity data..? Ashish anand
2003-06-05 11:27 ` Ralf Baechle
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