From: ilya@theIlya.com
To: ralf@linux-mips.org
Cc: linux-mips@linux-mips.org
Subject: ip32 timer setup fix
Date: Sun, 29 Jun 2003 20:13:38 -0700 [thread overview]
Message-ID: <20030630031338.GK13617@gateway.total-knowledge.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 47 bytes --]
Attached is patch to fix timer setup on IP32.
[-- Attachment #2: ip32-timer.diff --]
[-- Type: text/plain, Size: 2382 bytes --]
Index: arch/mips/sgi-ip32/ip32-timer.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/ip32-timer.c,v
retrieving revision 1.12
diff -u -r1.12 ip32-timer.c
--- arch/mips/sgi-ip32/ip32-timer.c 29 Jun 2003 21:59:13 -0000 1.12
+++ arch/mips/sgi-ip32/ip32-timer.c 30 Jun 2003 03:07:47 -0000
@@ -45,11 +45,17 @@
#define USECS_PER_JIFFY (1000000/HZ)
+static irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs);
+
void __init ip32_timer_setup (struct irqaction *irq)
{
u64 crime_time;
u32 cc_tick;
+
+ write_c0_count(0);
+ irq->handler = cc_timer_interrupt;
+
printk("Calibrating system timer... ");
crime_time = crime_read_64(CRIME_TIME) & CRIME_TIME_MASK;
@@ -70,12 +76,14 @@
printk("%d MHz CPU detected\n", (int) (cc_interval / PER_MHZ));
setup_irq (CLOCK_IRQ, irq);
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+ /* Set ourselves up for future interrupts */
+ write_c0_compare(read_c0_count() + cc_interval);
+ change_c0_status(ST0_IM, ALLINTS);
+ local_irq_enable();
}
-struct irqaction irq0 = { NULL, SA_INTERRUPT, 0,
- "timer", NULL, NULL};
-
-irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+static irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
{
u32 count;
@@ -150,15 +158,4 @@
xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
xtime.tv_nsec = 0;
write_sequnlock_irq(&xtime_lock);
-
- write_c0_count(0);
- irq0.handler = cc_timer_interrupt;
-
- ip32_timer_setup (&irq0);
-
-#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
- /* Set ourselves up for future interrupts */
- write_c0_compare(read_c0_count() + cc_interval);
- change_c0_status(ST0_IM, ALLINTS);
- local_irq_enable();
}
Index: arch/mips/sgi-ip32/ip32-setup.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/sgi-ip32/ip32-setup.c,v
retrieving revision 1.4
diff -u -r1.4 ip32-setup.c
--- arch/mips/sgi-ip32/ip32-setup.c 14 Apr 2003 16:33:24 -0000 1.4
+++ arch/mips/sgi-ip32/ip32-setup.c 30 Jun 2003 03:11:05 -0000
@@ -94,6 +94,7 @@
rtc_ops = &ip32_rtc_ops;
board_be_init = ip32_be_init;
board_time_init = ip32_time_init;
+ board_timer_setup = ip32_timer_setup();
crime_init ();
}
next reply other threads:[~2003-06-30 3:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-06-30 3:13 ilya [this message]
2003-06-30 13:28 ` ip32 timer setup fix Andrew Clausen
2003-06-30 3:27 ` ilya
2003-06-30 17:06 ` Jun Sun
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20030630031338.GK13617@gateway.total-knowledge.com \
--to=ilya@theilya.com \
--cc=linux-mips@linux-mips.org \
--cc=ralf@linux-mips.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox