* Au1500 Event and Performance Counters
@ 2003-06-30 21:46 Vince Bridgers
2003-07-02 1:21 ` Ralf Baechle
0 siblings, 1 reply; 2+ messages in thread
From: Vince Bridgers @ 2003-06-30 21:46 UTC (permalink / raw)
To: linux-mips
Has anyone used the Au1x00 performance event counter
register in CP0 (Register 25 - where it says AMD will
provide a list of the valid units and events when you
ask them) ?
Are they the same as some other MIPS processor that
defines the events in their databook?
Thanks
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* Re: Au1500 Event and Performance Counters
2003-06-30 21:46 Au1500 Event and Performance Counters Vince Bridgers
@ 2003-07-02 1:21 ` Ralf Baechle
0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2003-07-02 1:21 UTC (permalink / raw)
To: Vince Bridgers; +Cc: linux-mips
On Mon, Jun 30, 2003 at 02:46:41PM -0700, Vince Bridgers wrote:
> Has anyone used the Au1x00 performance event counter
> register in CP0 (Register 25 - where it says AMD will
> provide a list of the valid units and events when you
> ask them) ?
>
> Are they the same as some other MIPS processor that
> defines the events in their databook?
The MIPS32 spec to which the Au1x00 complies defines the structure and
interface of performance counters. It does not define which events
the counters count. Some non-MIPS32/64 processors also have slightly
different performance counter implementations. The R10000 and R12000
performance counters values are pretty similar.
Ralf
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