question about memory constraint in atomic_add

question about memory constraint in atomic_add

[Indigodfw]

Hello Gurus

Question from a mips new-bie

127 extern __inline__ void atomic_add(int i, atomic_t
* v)
128 {
129         unsigned long temp;
130 
131         __asm__ __volatile__(
132                 "1:   ll      %0, %1      #
atomic_add\n"
133                 "     addu    %0, %2              
   \n"
134                 "     sc      %0, %1              
   \n"
135                 "     beqz    %0, 1b              
   \n"
136                 : "=&r" (temp), "=m" (v->counter)
137                 : "Ir" (i), "m" (v->counter));
138 }

Now I look at the input operand  v->counter
We want two things :

1. Hint the compiler that memory at (v->counter) is
modified.

2. Result of (C expression) should go into %xyz
register 
So v->counter goes into %1, IOW ll from an int!

Does not make sense to me.
Why does it work, What am I missing?

I mean in general what is the expression for a m
constraint ptr (because I want ptr to be in regiser)
or *ptr (because I wanna tell compiler that *ptr is
what gets changed) 

I hope you include me in reply as I am not subscribed
to this list. Is there anyway to check this mailing
list online

Thanks and regards



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Re: question about memory constraint in atomic_add

[Ralf Baechle]

On Sat, Feb 14, 2004 at 07:11:52AM -0800, Indigodfw wrote:

> 2. Result of (C expression) should go into %xyz
> register 
> So v->counter goes into %1, IOW ll from an int!
> 
> Does not make sense to me.
> Why does it work, What am I missing?

> I mean in general what is the expression for a m
> constraint ptr (because I want ptr to be in regiser)
> or *ptr (because I wanna tell compiler that *ptr is
> what gets changed) 

"m" gives you *something* suitable to address a memory object; that isn't
necessarily a memory address.  On MIPS it can't even be just an address
in a register because "m" constraints are used with loads and stores and
those only accept the offset(reg) addressing mode.  If you want an address
use something like "r" (&v->counter), then lw reg,(%xxx).

  Ralf

Re: question about memory constraint in atomic_add

[Indigodfw]

Hi Ralf

Thanks for response, but I did not understand your
point. Please read inline.

--- Ralf Baechle <ralf@linux-mips.org> wrote:
> On Sat, Feb 14, 2004 at 07:11:52AM -0800, Indigodfw
> wrote:
> 
> > 2. Result of (C expression) should go into %xyz
> > register 
> > So v->counter goes into %1, IOW ll from an int!
> > 
> > Does not make sense to me.
> > Why does it work, What am I missing?
> 
> > I mean in general what is the expression for a m
> > constraint ptr (because I want ptr to be in
> regiser)
> > or *ptr (because I wanna tell compiler that *ptr
> is
> > what gets changed) 
> 
> "m" gives you *something* suitable to address a
> memory object; that isn't
> necessarily a memory address.  On MIPS it can't even
> be just an address
> in a register because "m" constraints are used with
> loads and stores and
> those only accept the offset(reg) addressing mode. 
> If you want an address
> use something like "r" (&v->counter), then lw
> reg,(%xxx).

Well, is not that what we want?
That is, we want to load (using ll) from &v->counter.

Should not the code have been
ll     %0, 0(%1) 
where %1 is "=m" (&v->counter)

The way I interpret it is:
a) %1 will contain address of v->counter
b) We would do ll (load with reservation/lock) from %1
which is &v->counter (and not from v->counter)
c)We want to tell the compiler that &v->counter is
output constraint and it may be modified. (Since
compiler does not look inside asm). 
But I fear that with the syntax "=m" (&v->counter) we
are informing the compiler that this ptr itself may be
modified instead of its contents. 

Thanks


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Re: question about memory constraint in atomic_add

[Daniel Jacobowitz]

On Wed, Feb 18, 2004 at 04:11:32PM -0800, Indigodfw wrote:
> Well, is not that what we want?
> That is, we want to load (using ll) from &v->counter.
> 
> Should not the code have been
> ll     %0, 0(%1) 
> where %1 is "=m" (&v->counter)

No, it would be ll %0, %1.  The result of an m constraint will be a
register-and-offset term like 0($13) or 256($13).

-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer