pci-ip27 memory ranges

pci-ip27 memory ranges

[Stanislaw Skowronek]

Why does the pci-ip27 driver register all memory resources (0UL - ~0UL)? I
had to change it to the appropriate Xtalk window to get the kernel to
recognize PCI at all.

Now, the IOC3 makes a kernel panic. Will see...

Stanislaw Skowronek

--<=>--
  Paranoid: one who is truly in touch with reality.

Re: pci-ip27 memory ranges

[Christoph Hellwig]

On Sat, Apr 24, 2004 at 11:00:44AM +0200, Stanislaw Skowronek wrote:
> Why does the pci-ip27 driver register all memory resources (0UL - ~0UL)?

The current PCI support for IP27 is more or less a huge hack.  I plan to
hack it up to do the right thing based on the IRIX code for it released
by SGI, but it'll take a bit because that code isn't exactly readable
and my time is rather limited.

Re: pci-ip27 memory ranges

[Ralf Baechle]

On Sat, Apr 24, 2004 at 11:00:44AM +0200, Stanislaw Skowronek wrote:

> Why does the pci-ip27 driver register all memory resources (0UL - ~0UL)? I
> had to change it to the appropriate Xtalk window to get the kernel to
> recognize PCI at all.

The IP27 PCI code as it is in CVS is incomplete or even broken - however
fixing isn't entirely trivial.  The current workaround which I use - and
which due to being just an evil hack is not in CVS - to only scan the PCI
code.  The problem is the firmware does a very simple setup which hurts
performance very badly, so eventually Linux will have to do a full PCI
configuration for all PCI busses.

> Now, the IOC3 makes a kernel panic. Will see...

  Ralf