jump instruction in delay slot

jump instruction in delay slot

[Thomas Koeller]

Hi,

the following code snippet is from
arch/mips/pmc-sierra/yosemite/irq-handler.S:

ll_duart_irq:
		li	a0, 4
		move	a1, sp
		jal	do_IRQ
		j	ret_from_irq

I wonder if this is correct. AFAIK, a jump instruction
must not occupy the delay slot of another branch or
jump instruction. Since the 'jal' returns to the first
instruction after the delay slot, I would expect the
effect of the 'j' instruction to be cancelled. Or
is this some kind of trick I do not understand?

tk

-- 
--------------------------------------------------

Thomas Koeller, Software Development
Basler Vision Technologies

thomas dot koeller at baslerweb dot com
http://www.baslerweb.com

==============================

Re: jump instruction in delay slot

[Thiemo Seufer]

Thomas Koeller wrote:
> Hi,
> 
> the following code snippet is from
> arch/mips/pmc-sierra/yosemite/irq-handler.S:
> 
> ll_duart_irq:
> 		li	a0, 4
> 		move	a1, sp
> 		jal	do_IRQ
> 		j	ret_from_irq
> 
> I wonder if this is correct. AFAIK, a jump instruction
> must not occupy the delay slot of another branch or
> jump instruction. Since the 'jal' returns to the first
> instruction after the delay slot, I would expect the
> effect of the 'j' instruction to be cancelled. Or
> is this some kind of trick I do not understand?

I guess this code has no preceeding ".set noreorder" directive.
By default, your friendly assembler handles delay slots for you. :-)


Thiemo

Re: jump instruction in delay slot

[Thomas Koeller]

On Tuesday 19 October 2004 16:32, Kevin D. Kissell wrote:

> By default, a MIPS assembler will automatically
> fill delay slots and even move instructions around
> to fill them.  This can be inhibited by the
>     set .noreorder
> directive, of which you'll note there is one in the
> top level tital_handle_int routine, but there's a
>     set .reorder
> at the end of that routine, so by the time it gets to
> the code you're interested in, things should be OK.

I see. I really wonder if there is any up-to-date
documentation covering the mips-specific features
of gas. Have been googling for it, no success so
far.

thanks,
Thomas
-- 
--------------------------------------------------

Thomas Koeller, Software Development

Basler Vision Technologies
An der Strusbek 60-62
22926 Ahrensburg
Germany

Tel +49 (4102) 463-390
Fax +49 (4102) 463-46390

mailto:thomas.koeller@baslerweb.com
http://www.baslerweb.com

==============================

Re: jump instruction in delay slot

[Thomas Koeller]

On Tuesday 19 October 2004 18:00, Andrew Dyer wrote:

> Also, idt has a good book online in pdf called
> IDT MIPS Microprocessor Family
> Software Reference Manual
>
> it has a good section on assembly collecting info
> from a lot of places.

That was a good hint, thanks a lot!

Thomas
-- 
--------------------------------------------------

Thomas Koeller, Software Development
Basler Vision Technologies

thomas dot koeller at baslerweb dot com
http://www.baslerweb.com

==============================

Re: jump instruction in delay slot

[Ralf Baechle]

On Tue, Oct 19, 2004 at 07:00:02PM +0200, Thomas Koeller wrote:

> > Also, idt has a good book online in pdf called
> > IDT MIPS Microprocessor Family
> > Software Reference Manual
> >
> > it has a good section on assembly collecting info
> > from a lot of places.
> 
> That was a good hint, thanks a lot!

In case you have an IRIX system with documentation at hand you may check
it's documentation.  The assembler dialects differ a bit but both are
close enough and some details are only well explained in the IRIX
documentation.

  Ralf

Re: jump instruction in delay slot

[Ralf Baechle]

On Tue, Oct 19, 2004 at 04:05:47PM +0200, Thomas Koeller wrote:

> 		jal	do_IRQ
> 		j	ret_from_irq

Beyond what Thiemo has said correctly ...  in the cases where I've tried
to debug code where a jmp or branch instruction was being executed in the
delay slot of another jump or branch instruction the CPU does *really*
unexpected things.

  Ralf