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* why not put 64 bit value directly to register
@ 2006-04-26  4:49 Bin Chen
  2006-04-26 11:28 ` Thiemo Seufer
  0 siblings, 1 reply; 2+ messages in thread
From: Bin Chen @ 2006-04-26  4:49 UTC (permalink / raw)
  To: linux-mips

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Hi,

This code is snip from u-boot, I don't know why the 32bit-64bit conversion
is needed, why not put val directly to register but do the transform?

static void cvmx_write_cop0_entry_lo_0(uint64_t val)
{
    uint32_t val_low  = val & 0xffffffff;
    uint32_t val_high = val  >> 32;

    uint32_t tmp; /* temp register */

    asm volatile (
        "  .set mips64                       \n"
        "  .set noreorder                    \n"
        /* Standard twin 32 bit -> 64 bit construction */
        "  dsll  %[valh], 32                 \n"
        "  dla   %[tmp], 0xffffffff          \n"
        "  and   %[vall], %[tmp], %[vall]    \n"
        "  daddu %[valh], %[valh], %[vall]   \n"
        /* Combined value is in valh */
        "  dmtc0 %[valh],$2,0                \n"
        "  .set reorder                      \n"
         :[tmp] "=&r" (tmp) : [valh] "r" (val_high), [vall] "r" (val_low) );
}

Thanks.
B.C

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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: why not put 64 bit value directly to register
  2006-04-26  4:49 why not put 64 bit value directly to register Bin Chen
@ 2006-04-26 11:28 ` Thiemo Seufer
  0 siblings, 0 replies; 2+ messages in thread
From: Thiemo Seufer @ 2006-04-26 11:28 UTC (permalink / raw)
  To: Bin Chen; +Cc: linux-mips

Bin Chen wrote:
> Hi,
> 
> This code is snip from u-boot, I don't know why the 32bit-64bit conversion
> is needed, why not put val directly to register but do the transform?
> 
> static void cvmx_write_cop0_entry_lo_0(uint64_t val)
> {
>     uint32_t val_low  = val & 0xffffffff;
>     uint32_t val_high = val  >> 32;
> 
>     uint32_t tmp; /* temp register */
> 
>     asm volatile (
>         "  .set mips64                       \n"
>         "  .set noreorder                    \n"
>         /* Standard twin 32 bit -> 64 bit construction */
>         "  dsll  %[valh], 32                 \n"
>         "  dla   %[tmp], 0xffffffff          \n"
>         "  and   %[vall], %[tmp], %[vall]    \n"
>         "  daddu %[valh], %[valh], %[vall]   \n"
>         /* Combined value is in valh */
>         "  dmtc0 %[valh],$2,0                \n"
>         "  .set reorder                      \n"
>          :[tmp] "=&r" (tmp) : [valh] "r" (val_high), [vall] "r" (val_low) );
> }

This will convert on a 64bit capable MIPS CPU an o32 ABI register pair
holding a long long to a 64bit register value, and write that to a CP0
register.

It will break if an exception happens in between unless the exception
handlers save/restore the upper half as well.


Thiemo

^ permalink raw reply	[flat|nested] 2+ messages in thread

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