does the SAVE_ALL nesting in kernel?

does the SAVE_ALL nesting in kernel?

[zhuzhenhua]

[-- Attachment #1: Type: text/plain, Size: 517 bytes --]

hello, all
            i have a mips board,  and the SDRAM speed(bus clock) is not too
fast.
             so i want change  the SAVE_ALL and RESTORE_ALL to use
internal-ram(high speed).
            i just wonder whether the SAVE_ALL netsting in kernel  for mips
arch?
            if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs
X4, and some cp0_regs).
            but if  the SAVE_ALL nesting, maybe i need to keep a stack in
internal-ram.
            thanks for any hints．

Best Regards

--
zzh

[-- Attachment #2: Type: text/html, Size: 855 bytes --]

Re: does the SAVE_ALL nesting in kernel?

[Dajie Tan]

Which exception handler do you want to be nested?

If it's not a interrupt handler you can use STI(enable interrupts) or
CLI(disable interrupts) after SAVE_ALL for nesting support. They all
clear EXL bit in CP0_STATUS register and set the KSU=00.


2007/9/12, zhuzhenhua <zzh.hust@gmail.com>:
> hello, all
>              i have a mips board,  and the SDRAM speed(bus clock) is not too
> fast.
>               so i want change  the SAVE_ALL and RESTORE_ALL to use
> internal-ram(high speed).
>              i just wonder whether the SAVE_ALL netsting in kernel  for mips
> arch?
>              if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs
> X4, and some cp0_regs).
>              but if  the SAVE_ALL nesting, maybe i need to keep a stack in
> internal-ram.
>              thanks for any hints．
>
>  Best Regards
>
>  --
>  zzh
>
>


-- 
为天地立心
为生民立命
为往圣继绝学
为万世开太平

Re: does the SAVE_ALL nesting in kernel?

[Dajie Tan]

You can see this document for more details:

http://www.xtrj.org/mips/default.htm

or the document for analysing the process of exception and interrupt
of mips linux:

http://people.openrays.org/~comcat/mydoc/mips.linux.inter.pdf




2007/9/12, Dajie Tan <jiankemeng@gmail.com>:
> Which exception handler do you want to be nested?
>
> If it's not a interrupt handler you can use STI(enable interrupts) or
> CLI(disable interrupts) after SAVE_ALL for nesting support. They all
> clear EXL bit in CP0_STATUS register and set the KSU=00.
>
>
> 2007/9/12, zhuzhenhua <zzh.hust@gmail.com>:
> > hello, all
> >              i have a mips board,  and the SDRAM speed(bus clock) is not too
> > fast.
> >               so i want change  the SAVE_ALL and RESTORE_ALL to use
> > internal-ram(high speed).
> >              i just wonder whether the SAVE_ALL netsting in kernel  for mips
> > arch?
> >              if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs
> > X4, and some cp0_regs).
> >              but if  the SAVE_ALL nesting, maybe i need to keep a stack in
> > internal-ram.
> >              thanks for any hints．
> >
> >  Best Regards
> >
> >  --
> >  zzh
> >
> >
>
>
> --
> 为天地立心
> 为生民立命
> 为往圣继绝学
> 为万世开太平
>


-- 
为天地立心
为生民立命
为往圣继绝学
为万世开太平

Re: does the SAVE_ALL nesting in kernel?

[Kevin D. Kissell]

[-- Attachment #1: Type: text/plain, Size: 1921 bytes --]

SAVE_ALL can certainly nest in MIPS Linux.  This is why there's a check at the beginning of SAVE_SOME to determine whether the exception was take in user-mode, to see if the kernel stackpointer should be loaded from memory or computed relative to the current stack frame.   Another thing to keep in mind in looking at these sorts of optimizations is that each scheduling thread has its own kernel stack area. So if you're very very motivated, you could conceivably come up with a hack whereby the first level of exceptions uses your internal RAM array for a stack, but nested ones use external memory, *but*, you'd at least need room for as many first-level stack frames in your internal RAM as you have concurrent processes/threads in the system, or you'd need to mutilate the context switch code to copy the first level stack frames in and out of external memory on a context switch.  I don't think that's a good path to go down.

If you have functioning caches, they won't be as perfect as a scratchpad, but you won't have all the additional context switch overhead, and they will automagically do approximately what you want, without your having to change any code.

            Kevin K.
  ----- Original Message ----- 
  From: zhuzhenhua 
  To: linux-mips 
  Sent: Wednesday, September 12, 2007 4:21 AM
  Subject: does the SAVE_ALL nesting in kernel?


  hello, all
              i have a mips board,  and the SDRAM speed(bus clock) is not too fast.
               so i want change  the SAVE_ALL and RESTORE_ALL to use internal-ram(high speed).
              i just wonder whether the SAVE_ALL netsting in kernel  for mips arch?
              if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs X4, and some cp0_regs).
              but if  the SAVE_ALL nesting, maybe i need to keep a stack in internal-ram.
              thanks for any hints．

  Best Regards

  --
  zzh


[-- Attachment #2: Type: text/html, Size: 3494 bytes --]

Re: does the SAVE_ALL nesting in kernel?

[Ralf Baechle]

On Wed, Sep 12, 2007 at 10:21:53AM +0800, zhuzhenhua wrote:

>             i have a mips board,  and the SDRAM speed(bus clock) is not too
> fast.
>              so i want change  the SAVE_ALL and RESTORE_ALL to use
> internal-ram(high speed).
>             i just wonder whether the SAVE_ALL netsting in kernel  for mips
> arch?
>             if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs
> X4, and some cp0_regs).
>             but if  the SAVE_ALL nesting, maybe i need to keep a stack in
> internal-ram.
>             thanks for any hints．

Nesting works but due to the use of k0/k1 you need to ensure SAVE_ALL is
only invoked with interrupts disabled.

  Ralf

Re: does the SAVE_ALL nesting in kernel?

[zhuzhenhua]

[-- Attachment #1: Type: text/plain, Size: 2179 bytes --]

On 9/12/07, Kevin D. Kissell <kevink@mips.com> wrote:
>
>  SAVE_ALL can certainly nest in MIPS Linux.  This is why there's a check
> at the beginning of SAVE_SOME to determine whether the exception was take in
> user-mode, to see if the kernel stackpointer should be loaded from memory or
> computed relative to the current stack frame.   Another thing to keep in
> mind in looking at these sorts of optimizations is that each scheduling
> thread has its own kernel stack area. So if you're very very motivated, you
> could conceivably come up with a hack whereby the first level of exceptions
> uses your internal RAM array for a stack, but nested ones use external
> memory, *but*, you'd at least need room for as many first-level stack frames
> in your internal RAM as you have concurrent processes/threads in the system,
> or you'd need to mutilate the context switch code to copy the first level
> stack frames in and out of external memory on a context switch.  I don't
> think that's a good path to go down.
>

thanks for your advice, i  think a hack whereby the first level of
exceptions maybe is easy to modify.i will try it


If you have functioning caches, they won't be as perfect as a scratchpad,
> but you won't have all the additional context switch overhead, and they will
> automagically do approximately what you want, without your having to change
> any code.
>
>             Kevin K.
>
> ----- Original Message -----
> *From:* zhuzhenhua <zzh.hust@gmail.com>
> *To:* linux-mips <linux-mips@linux-mips.org>
> *Sent:* Wednesday, September 12, 2007 4:21 AM
> *Subject:* does the SAVE_ALL nesting in kernel?
>
> hello, all
>             i have a mips board,  and the SDRAM speed(bus clock) is not
> too fast.
>              so i want change  the SAVE_ALL and RESTORE_ALL to use
> internal-ram(high speed).
>             i just wonder whether the SAVE_ALL netsting in kernel  for
> mips arch?
>             if not, i think  maybe 1k byte for SAVE_ALL is enough( 32regs
> X4, and some cp0_regs).
>             but if  the SAVE_ALL nesting, maybe i need to keep a stack in
> internal-ram.
>             thanks for any hints．
>
> Best Regards
>
> --
> zzh
>
>

[-- Attachment #2: Type: text/html, Size: 4982 bytes --]