* [PATCH] Use real cache invalidate
@ 2007-11-26 22:40 Thomas Bogendoerfer
2007-11-27 14:16 ` Ralf Baechle
0 siblings, 1 reply; 2+ messages in thread
From: Thomas Bogendoerfer @ 2007-11-26 22:40 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
R10k non coherent machines need a real dma cache invalidate to get
rid of speculative stores in cache.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 9355f1c..82d0d3e 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -598,7 +598,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
if (size >= scache_size)
r4k_blast_scache();
else
- blast_scache_range(addr, addr + size);
+ blast_inv_scache_range(addr, addr + size);
return;
}
@@ -606,7 +606,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
r4k_blast_dcache();
} else {
R4600_HIT_CACHEOP_WAR_IMPL;
- blast_dcache_range(addr, addr + size);
+ blast_inv_dcache_range(addr, addr + size);
}
bc_inv(addr, size);
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 2b8466f..4c140db 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -403,6 +403,13 @@ __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16)
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64)
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128)
+
/* build blast_xxx_range, protected_blast_xxx_range */
#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \
static inline void prot##blast_##pfx##cache##_range(unsigned long start, \
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] Use real cache invalidate
2007-11-26 22:40 [PATCH] Use real cache invalidate Thomas Bogendoerfer
@ 2007-11-27 14:16 ` Ralf Baechle
0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2007-11-27 14:16 UTC (permalink / raw)
To: Thomas Bogendoerfer; +Cc: linux-mips
On Mon, Nov 26, 2007 at 11:40:01PM +0100, Thomas Bogendoerfer wrote:
> R10k non coherent machines need a real dma cache invalidate to get
> rid of speculative stores in cache.
Wonderful. This should also deliver a slight performance benefit for
other systems.
Ralf
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2007-11-27 14:16 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-11-26 22:40 [PATCH] Use real cache invalidate Thomas Bogendoerfer
2007-11-27 14:16 ` Ralf Baechle
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox