[PATCH] MIPS: use thread flag to choose math emulator register mode

[PATCH] MIPS: use thread flag to choose math emulator register mode

[Corey Minyard]

From: Corey Minyard <cminyard@mvista.com>

If a processor does not have floating point support, then the
cp0_status FR bit will always be set to 0 according to the MIPS
documents.  So using that to tell if the userland is in 32 or 64 bit
register mode on a 64-bit processor is kind of pointless.

Instead, use the thread flag that are designed for this purpose.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
---

Index: linux-2.6.24/arch/mips/math-emu/cp1emu.c
===================================================================
--- linux-2.6.24.orig/arch/mips/math-emu/cp1emu.c
+++ linux-2.6.24/arch/mips/math-emu/cp1emu.c
@@ -178,18 +178,21 @@ static int isBranchInstr(mips_instructio
 #define FR_BIT 0
 #endif
 
+#define FR_64_BIT_SUPPORT (!test_thread_flag(TIF_32BIT_REGS))
+#define FR_32_BIT_REG_MASK (~(FR_64_BIT_SUPPORT == 0))
+
 #define SIFROMREG(si, x) ((si) = \
-			(xcp->cp0_status & FR_BIT) || !(x & 1) ? \
+			(FR_64_BIT_SUPPORT) || !(x & 1) ? \
 			(int)ctx->fpr[x] : \
 			(int)(ctx->fpr[x & ~1] >> 32 ))
-#define SITOREG(si, x)	(ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
-			(xcp->cp0_status & FR_BIT) || !(x & 1) ? \
+#define SITOREG(si, x)	(ctx->fpr[x & FR_32_BIT_REG_MASK] = \
+			FR_64_BIT_SUPPORT || !(x & 1) ? \
 			ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
 			ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
 
 #define DIFROMREG(di, x) ((di) = \
-			ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)])
-#define DITOREG(di, x)	(ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
+			ctx->fpr[x & FR_32_BIT_REG_MASK])
+#define DITOREG(di, x)	(ctx->fpr[x & FR_32_BIT_REG_MASK] \
 			= (di))
 
 #define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)