From: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Cc: linux-mips <linux-mips@linux-mips.org>
Subject: Re: [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack()
Date: Mon, 17 Mar 2008 16:16:35 +0000 [thread overview]
Message-ID: <20080317161635.GA25549@linux-mips.org> (raw)
In-Reply-To: <20080317234740.705a8a34.yoichi_yuasa@tripeaks.co.jp>
On Mon, Mar 17, 2008 at 11:47:40PM +0900, Yoichi Yuasa wrote:
> VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare().
Interesting. I wonder why you need this patch but nobody else?
Ralf
next prev parent reply other threads:[~2008-03-17 16:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-17 14:47 [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Yoichi Yuasa
2008-03-17 14:49 ` [PATCH 2/2][MIPS] add irq_disable_hazard() before c0_compare_int_pending() Yoichi Yuasa
2008-03-17 16:16 ` Ralf Baechle [this message]
2008-03-18 4:47 ` [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Yoichi Yuasa
2008-03-18 13:27 ` Ralf Baechle
2008-03-19 7:38 ` [PATCH][MIPS] add CP0 hazard to CP0 compare register accesses Yoichi Yuasa
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