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* [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack()
@ 2008-03-17 14:47 Yoichi Yuasa
  2008-03-17 14:49 ` [PATCH 2/2][MIPS] add irq_disable_hazard() before c0_compare_int_pending() Yoichi Yuasa
  2008-03-17 16:16 ` [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Ralf Baechle
  0 siblings, 2 replies; 6+ messages in thread
From: Yoichi Yuasa @ 2008-03-17 14:47 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: yoichi_yuasa, linux-mips

VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare().
However, the problem can be solved by replacing this by c0_timer_ack(). 

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X /home/yuasa/Memo/dontdiff linux-orig/arch/mips/kernel/cevt-r4k.c linux/arch/mips/kernel/cevt-r4k.c
--- linux-orig/arch/mips/kernel/cevt-r4k.c	2008-03-11 10:10:09.453835304 +0900
+++ linux/arch/mips/kernel/cevt-r4k.c	2008-03-12 16:35:42.911447048 +0900
@@ -186,7 +186,7 @@ static int c0_compare_int_usable(void)
 	 * IP7 already pending?  Try to clear it by acking the timer.
 	 */
 	if (c0_compare_int_pending()) {
-		write_c0_compare(read_c0_count());
+		c0_timer_ack();
 		irq_disable_hazard();
 		if (c0_compare_int_pending())
 			return 0;
@@ -198,7 +198,7 @@ static int c0_compare_int_usable(void)
 		write_c0_compare(cnt);
 		irq_disable_hazard();
 		if ((int)(read_c0_count() - cnt) < 0)
-		    break;
+			break;
 		/* increase delta if the timer was already expired */
 	}
 
@@ -208,7 +208,7 @@ static int c0_compare_int_usable(void)
 	if (!c0_compare_int_pending())
 		return 0;
 
-	write_c0_compare(read_c0_count());
+	c0_timer_ack();
 	irq_disable_hazard();
 	if (c0_compare_int_pending())
 		return 0;

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 2/2][MIPS] add irq_disable_hazard() before c0_compare_int_pending()
  2008-03-17 14:47 [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Yoichi Yuasa
@ 2008-03-17 14:49 ` Yoichi Yuasa
  2008-03-17 16:16 ` [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Ralf Baechle
  1 sibling, 0 replies; 6+ messages in thread
From: Yoichi Yuasa @ 2008-03-17 14:49 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: yoichi_yuasa, linux-mips

Add irq_disable_hazard() before c0_compare_int_pending().

VR41xx sometime fails at this point.
It can be fix this patch.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X /home/yuasa/Memo/dontdiff linux-orig/arch/mips/kernel/cevt-r4k.c linux/arch/mips/kernel/cevt-r4k.c
--- linux-orig/arch/mips/kernel/cevt-r4k.c	2008-03-12 16:37:31.317624763 +0900
+++ linux/arch/mips/kernel/cevt-r4k.c	2008-03-12 16:37:39.894113510 +0900
@@ -205,6 +205,7 @@ static int c0_compare_int_usable(void)
 	while ((int)(read_c0_count() - cnt) <= 0)
 		;	/* Wait for expiry  */
 
+	irq_disable_hazard();
 	if (!c0_compare_int_pending())
 		return 0;
 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack()
  2008-03-17 14:47 [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Yoichi Yuasa
  2008-03-17 14:49 ` [PATCH 2/2][MIPS] add irq_disable_hazard() before c0_compare_int_pending() Yoichi Yuasa
@ 2008-03-17 16:16 ` Ralf Baechle
  2008-03-18  4:47   ` Yoichi Yuasa
  1 sibling, 1 reply; 6+ messages in thread
From: Ralf Baechle @ 2008-03-17 16:16 UTC (permalink / raw)
  To: Yoichi Yuasa; +Cc: linux-mips

On Mon, Mar 17, 2008 at 11:47:40PM +0900, Yoichi Yuasa wrote:

> VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare().

Interesting.  I wonder why you need this patch but nobody else?

  Ralf

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack()
  2008-03-17 16:16 ` [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Ralf Baechle
@ 2008-03-18  4:47   ` Yoichi Yuasa
  2008-03-18 13:27     ` Ralf Baechle
  0 siblings, 1 reply; 6+ messages in thread
From: Yoichi Yuasa @ 2008-03-18  4:47 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: yoichi_yuasa, linux-mips

Hi Ralf,

On Mon, 17 Mar 2008 16:16:35 +0000
Ralf Baechle <ralf@linux-mips.org> wrote:

> On Mon, Mar 17, 2008 at 11:47:40PM +0900, Yoichi Yuasa wrote:
> 
> > VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare().
> 
> Interesting.  I wonder why you need this patch but nobody else?

Three NOP are necessary on the TB0287(VR4131 board).

Yoichi

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack()
  2008-03-18  4:47   ` Yoichi Yuasa
@ 2008-03-18 13:27     ` Ralf Baechle
  2008-03-19  7:38       ` [PATCH][MIPS] add CP0 hazard to CP0 compare register accesses Yoichi Yuasa
  0 siblings, 1 reply; 6+ messages in thread
From: Ralf Baechle @ 2008-03-18 13:27 UTC (permalink / raw)
  To: Yoichi Yuasa; +Cc: linux-mips

On Tue, Mar 18, 2008 at 01:47:20PM +0900, Yoichi Yuasa wrote:

> On Mon, 17 Mar 2008 16:16:35 +0000
> Ralf Baechle <ralf@linux-mips.org> wrote:
> 
> > On Mon, Mar 17, 2008 at 11:47:40PM +0900, Yoichi Yuasa wrote:
> > 
> > > VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare().
> > 
> > Interesting.  I wonder why you need this patch but nobody else?
> 
> Three NOP are necessary on the TB0287(VR4131 board).

That much was obvious from your patch.  I was more wondering about this
change:

-               write_c0_compare(read_c0_count());
+               c0_timer_ack();

c0_timer_ack is defined as

static void c0_timer_ack(void)
{
        write_c0_compare(read_c0_compare());
}

so your patch does a functional change there - even though it should not
actually matter.  So I was wondering if for some reason you need that
change.

Just interested - it looks a bit cleaner so I'm leaning to apply this
change anyway.

  Ralf

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH][MIPS] add CP0 hazard to CP0 compare register accesses
  2008-03-18 13:27     ` Ralf Baechle
@ 2008-03-19  7:38       ` Yoichi Yuasa
  0 siblings, 0 replies; 6+ messages in thread
From: Yoichi Yuasa @ 2008-03-19  7:38 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: yoichi_yuasa, linux-mips

Hi,

On Tue, 18 Mar 2008 13:27:09 +0000
Ralf Baechle <ralf@linux-mips.org> wrote:

> On Tue, Mar 18, 2008 at 01:47:20PM +0900, Yoichi Yuasa wrote:
> 
> > On Mon, 17 Mar 2008 16:16:35 +0000
> > Ralf Baechle <ralf@linux-mips.org> wrote:
> > 
> > > On Mon, Mar 17, 2008 at 11:47:40PM +0900, Yoichi Yuasa wrote:
> > > 
> > > > VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare().
> > > 
> > > Interesting.  I wonder why you need this patch but nobody else?
> > 
> > Three NOP are necessary on the TB0287(VR4131 board).
> 
> That much was obvious from your patch.  I was more wondering about this
> change:
> 
> -               write_c0_compare(read_c0_count());
> +               c0_timer_ack();
> 
> c0_timer_ack is defined as
> 
> static void c0_timer_ack(void)
> {
>         write_c0_compare(read_c0_compare());
> }
> 
> so your patch does a functional change there - even though it should not
> actually matter.  So I was wondering if for some reason you need that
> change.

OK, update my patch.
Two patches have been brought together in one.

How about this?

VR41xx, CP0 hazard is necessary between read_c0_count() and write_c0_compare()
(or read_c0_cause()).

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X /home/yuasa/Memo/dontdiff linux-orig/arch/mips/kernel/cevt-r4k.c linux/arch/mips/kernel/cevt-r4k.c
--- linux-orig/arch/mips/kernel/cevt-r4k.c	2008-03-19 11:35:53.017749179 +0900
+++ linux/arch/mips/kernel/cevt-r4k.c	2008-03-19 16:31:29.617938142 +0900
@@ -186,7 +186,9 @@ static int c0_compare_int_usable(void)
 	 * IP7 already pending?  Try to clear it by acking the timer.
 	 */
 	if (c0_compare_int_pending()) {
-		write_c0_compare(read_c0_count());
+		cnt = read_c0_count();
+		back_to_back_c0_hazard();
+		write_c0_compare(cnt);
 		irq_disable_hazard();
 		if (c0_compare_int_pending())
 			return 0;
@@ -205,10 +207,13 @@ static int c0_compare_int_usable(void)
 	while ((int)(read_c0_count() - cnt) <= 0)
 		;	/* Wait for expiry  */
 
+	back_to_back_c0_hazard();
 	if (!c0_compare_int_pending())
 		return 0;
 
-	write_c0_compare(read_c0_count());
+	cnt = read_c0_count();
+	back_to_back_c0_hazard();
+	write_c0_compare(cnt);
 	irq_disable_hazard();
 	if (c0_compare_int_pending())
 		return 0;

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2008-03-19  7:38 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-03-17 14:47 [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Yoichi Yuasa
2008-03-17 14:49 ` [PATCH 2/2][MIPS] add irq_disable_hazard() before c0_compare_int_pending() Yoichi Yuasa
2008-03-17 16:16 ` [PATCH 1/2][MIPS] replace c0_compare acknowledge by c0_timer_ack() Ralf Baechle
2008-03-18  4:47   ` Yoichi Yuasa
2008-03-18 13:27     ` Ralf Baechle
2008-03-19  7:38       ` [PATCH][MIPS] add CP0 hazard to CP0 compare register accesses Yoichi Yuasa

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