[PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Yoichi Yuasa]

Fix divide by zero error in build_clear_page() and build_copy_page()

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

diff -pruN -X /home/yuasa/Memo/dontdiff linux-orig/arch/mips/mm/page.c linux/arch/mips/mm/page.c
--- linux-orig/arch/mips/mm/page.c	2008-05-07 10:28:03.732151097 +0900
+++ linux/arch/mips/mm/page.c	2008-05-07 23:27:00.212977534 +0900
@@ -310,8 +310,8 @@ void __cpuinit build_clear_page(void)
 	if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
 		uasm_i_lui(&buf, AT, 0xa000);
 
-	off = min(8, pref_bias_clear_store / cache_line_size) *
-	      cache_line_size;
+	off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size)
+	                        * cache_line_size : 0;
 	while (off) {
 		build_clear_pref(&buf, -off);
 		off -= cache_line_size;
@@ -454,12 +454,14 @@ void __cpuinit build_copy_page(void)
 	if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x())
 		uasm_i_lui(&buf, AT, 0xa000);
 
-	off = min(8, pref_bias_copy_load / cache_line_size) * cache_line_size;
+	off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
+	                        cache_line_size : 0;
 	while (off) {
 		build_copy_load_pref(&buf, -off);
 		off -= cache_line_size;
 	}
-	off = min(8, pref_bias_copy_store / cache_line_size) * cache_line_size;
+	off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
+	                        cache_line_size : 0;
 	while (off) {
 		build_copy_store_pref(&buf, -off);
 		off -= cache_line_size;

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Maciej W. Rozycki]

On Wed, 7 May 2008, Yoichi Yuasa wrote:

> Fix divide by zero error in build_clear_page() and build_copy_page()

 Why would ever cache_line_size be zero in this place?  Are you trying to 
support a cacheless CPU?  If not, it should be a BUG_ON().

  Maciej

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Yoichi Yuasa]

On Wed, 7 May 2008 17:14:22 +0100 (BST)
"Maciej W. Rozycki" <macro@linux-mips.org> wrote:

> On Wed, 7 May 2008, Yoichi Yuasa wrote:
> 
> > Fix divide by zero error in build_clear_page() and build_copy_page()
> 
>  Why would ever cache_line_size be zero in this place?  Are you trying to 
> support a cacheless CPU?  If not, it should be a BUG_ON().
> 

When CPU has no prefetch, no cache cdex_s and no caache cdex_p, cache_line_size is zero.
I confirmed it with Nevada(Cobalt server) and VR41xx.

Yoichi

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Maciej W. Rozycki]

On Thu, 8 May 2008, Yoichi Yuasa wrote:

> >  Why would ever cache_line_size be zero in this place?  Are you trying to 
> > support a cacheless CPU?  If not, it should be a BUG_ON().
> > 
> 
> When CPU has no prefetch, no cache cdex_s and no caache cdex_p, cache_line_size is zero.
> I confirmed it with Nevada(Cobalt server) and VR41xx.

 Fair enough.  I confused the variable with some others used to store the
actual line size of each of the caches.  Your change is correct, thank you
and sorry about the noise.

  Maciej

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Ralf Baechle]

On Thu, May 08, 2008 at 12:04:54AM +0100, Maciej W. Rozycki wrote:

> > >  Why would ever cache_line_size be zero in this place?  Are you trying to 
> > > support a cacheless CPU?  If not, it should be a BUG_ON().
> > > 
> > 
> > When CPU has no prefetch, no cache cdex_s and no caache cdex_p, cache_line_size is zero.
> > I confirmed it with Nevada(Cobalt server) and VR41xx.
> 
>  Fair enough.  I confused the variable with some others used to store the
> actual line size of each of the caches.  Your change is correct, thank you
> and sorry about the noise.

And I guess that means the variable should get a better name.

  Ralf

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Ralf Baechle]

On Wed, May 07, 2008 at 11:38:15PM +0900, Yoichi Yuasa wrote:

Applied a few days ago already.  Thanks!

  Ralf

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Atsushi Nemoto]

On Wed, 7 May 2008 23:38:15 +0900, Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> wrote:
> Fix divide by zero error in build_clear_page() and build_copy_page()
> 
> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
> 
> diff -pruN -X /home/yuasa/Memo/dontdiff linux-orig/arch/mips/mm/page.c linux/arch/mips/mm/page.c
> --- linux-orig/arch/mips/mm/page.c	2008-05-07 10:28:03.732151097 +0900
> +++ linux/arch/mips/mm/page.c	2008-05-07 23:27:00.212977534 +0900
...
> -	off = min(8, pref_bias_copy_store / cache_line_size) * cache_line_size;
> +	off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
> +	                        cache_line_size : 0;
>  	while (off) {
>  		build_copy_store_pref(&buf, -off);
>  		off -= cache_line_size;

This change is wrong.  Please apply this on top of the patch.

diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index cab81f4..1edf0cb 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -460,7 +460,7 @@ void __cpuinit build_copy_page(void)
 		build_copy_load_pref(&buf, -off);
 		off -= cache_line_size;
 	}
-	off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) *
+	off = cache_line_size ? min(8, pref_bias_copy_store / cache_line_size) *
 	                        cache_line_size : 0;
 	while (off) {
 		build_copy_store_pref(&buf, -off);

Re: [PATCH][MIPS] fix divide by zero error in build_clear_page and build_copy_page

[Ralf Baechle]

On Fri, May 30, 2008 at 01:07:21PM +0900, Atsushi Nemoto wrote:

> This change is wrong.  Please apply this on top of the patch.

Applied.

  Ralf