[PATCH] cevt-txx9: Reset timer counter on initialize

[PATCH] cevt-txx9: Reset timer counter on initialize

[Atsushi Nemoto]

The txx9_tmr_init() will not clear a timer counter register on certain
case.  The counter register is cleared on 1->0 transition of TCE bit
if CRE=1.  So just clearing TCE bit is not enough.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index 795cb8f..b5fc4eb 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -161,6 +161,9 @@ void __init txx9_tmr_init(unsigned long baseaddr)
 	struct txx9_tmr_reg __iomem *tmrptr;
 
 	tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg));
+	/* Start once to make CounterResetEnable effective */
+	__raw_writel(TXx9_TMTCR_CRE | TXx9_TMTCR_TCE, &tmrptr->tcr);
+	/* Stop and reset the counter */
 	__raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr);
 	__raw_writel(0, &tmrptr->tisr);
 	__raw_writel(0xffffffff, &tmrptr->cpra);

Re: [PATCH] cevt-txx9: Reset timer counter on initialize

[Ralf Baechle]

On Tue, Jun 24, 2008 at 11:26:38PM +0900, Atsushi Nemoto wrote:

> The txx9_tmr_init() will not clear a timer counter register on certain
> case.  The counter register is cleared on 1->0 transition of TCE bit
> if CRE=1.  So just clearing TCE bit is not enough.

Applied.  Thanks, Atsushi-San!

  Ralf