[PATCH 0/5] BCM47xx patches for 2.6.28

[PATCH 0/5] BCM47xx patches for 2.6.28

[Aurelien Jarno]

The following patches are a resent of patches sent earlier in order to
support the BCM47xx chips: 

      [MIPS] WGT634U: Add machine detection message
      [MIPS] Remove references to BCM947XX
      [MIPS] BCM47xx: Use the new SSB GPIO API
      [MIPS] Add WGT634U reset button support
      [MIPS] Scan PCI busses when they are registered

Compared to the previous version, one patch has been merged, and the
second patch has been updated to reflect the new location of this file.

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

[PATCH 1/5] [MIPS] WGT634U: Add machine detection message

[Aurelien Jarno]

This adds a printk message when a WGT634U machine is detected.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 arch/mips/bcm47xx/wgt634u.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index d1d90c9..f9e309a 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -112,6 +112,9 @@ static int __init wgt634u_init(void)
 	    ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
 	     (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
 		struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+
+		printk(KERN_INFO "WGT634U machine detected.\n");
+
 		wgt634u_flash_data.width = mcore->flash_buswidth;
 		wgt634u_flash_resource.start = mcore->flash_window;
 		wgt634u_flash_resource.end = mcore->flash_window
-- 
1.5.6.5

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

[PATCH 2/5] [MIPS] Remove references to BCM947XX

[Aurelien Jarno]

This patch removes the remaining reference
to the BCM947xx development board codename.

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 arch/mips/include/asm/mach-bcm47xx/war.h |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
index 4a2b798..87cd465 100644
--- a/arch/mips/include/asm/mach-bcm47xx/war.h
+++ b/arch/mips/include/asm/mach-bcm47xx/war.h
@@ -5,8 +5,8 @@
  *
  * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
  */
-#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H
-#define __ASM_MIPS_MACH_BCM947XX_WAR_H
+#ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
+#define __ASM_MIPS_MACH_BCM47XX_WAR_H
 
 #define R4600_V1_INDEX_ICACHEOP_WAR	0
 #define R4600_V1_HIT_CACHEOP_WAR	0
@@ -22,4 +22,4 @@
 #define R10000_LLSC_WAR			0
 #define MIPS34K_MISSED_ITLB_WAR		0
 
-#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */
+#endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
-- 
1.5.6.5


-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

[PATCH 3/5] [MIPS] BCM47xx: Use the new SSB GPIO API

[Aurelien Jarno]

This patch simplifies the BCM47xx GPIO code by using the new SSB GPIO
API, which does a lot things that were implemented directly in the
BCM47xx code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 arch/mips/Kconfig                         |    1 +
 arch/mips/bcm47xx/gpio.c                  |   85 ++++++++++++-----------------
 arch/mips/bcm47xx/setup.c                 |    5 +-
 arch/mips/include/asm/mach-bcm47xx/gpio.h |   41 +++++++-------
 4 files changed, 58 insertions(+), 74 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cd5fbf6..b905744 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -52,6 +52,7 @@ config BCM47XX
 	select SSB
 	select SSB_DRIVER_MIPS
 	select SSB_DRIVER_EXTIF
+	select SSB_EMBEDDED
 	select SSB_PCICORE_HOSTMODE if PCI
 	select GENERIC_GPIO
 	select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index f5a53ac..9b79880 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -12,68 +12,51 @@
 #include <asm/mach-bcm47xx/bcm47xx.h>
 #include <asm/mach-bcm47xx/gpio.h>
 
-int bcm47xx_gpio_to_irq(unsigned gpio)
+#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES)
+static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES);
+#else
+static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
+#endif
+
+int gpio_request(unsigned gpio, const char *tag)
 {
-	if (ssb_bcm47xx.chipco.dev)
-		return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
-	else if (ssb_bcm47xx.extif.dev)
-		return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
-	else
+	if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
+	    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
 		return -EINVAL;
-}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq);
 
-int bcm47xx_gpio_get_value(unsigned gpio)
-{
-	if (ssb_bcm47xx.chipco.dev)
-		return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio);
-	else if (ssb_bcm47xx.extif.dev)
-		return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio);
-	else
-		return 0;
-}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value);
+	if (ssb_extif_available(&ssb_bcm47xx.extif) &&
+	    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+		return -EINVAL;
 
-void bcm47xx_gpio_set_value(unsigned gpio, int value)
-{
-	if (ssb_bcm47xx.chipco.dev)
-		ssb_chipco_gpio_out(&ssb_bcm47xx.chipco,
-				    1 << gpio,
-				    value ? 1 << gpio : 0);
-	else if (ssb_bcm47xx.extif.dev)
-		ssb_extif_gpio_out(&ssb_bcm47xx.extif,
-				   1 << gpio,
-				   value ? 1 << gpio : 0);
-}
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value);
+	if (test_and_set_bit(gpio, gpio_in_use))
+		return -EBUSY;
 
-int bcm47xx_gpio_direction_input(unsigned gpio)
-{
-	if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
-		ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
-				      1 << gpio, 0);
-	else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
-		ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
-				     1 << gpio, 0);
-	else
-		return -EINVAL;
 	return 0;
 }
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input);
+EXPORT_SYMBOL(gpio_request);
 
-int bcm47xx_gpio_direction_output(unsigned gpio, int value)
+void gpio_free(unsigned gpio)
 {
-	bcm47xx_gpio_set_value(gpio, value);
+	if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
+	    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
+		return;
+
+	if (ssb_extif_available(&ssb_bcm47xx.extif) &&
+	    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+		return;
+
+	clear_bit(gpio, gpio_in_use);
+}
+EXPORT_SYMBOL(gpio_free);
 
-	if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
-		ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
-				      1 << gpio, 1 << gpio);
-	else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
-		ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
-				     1 << gpio, 1 << gpio);
+int gpio_to_irq(unsigned gpio)
+{
+	if (ssb_chipco_available(&ssb_bcm47xx.chipco))
+		return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
+	else if (ssb_extif_available(&ssb_bcm47xx.extif))
+		return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
 	else
 		return -EINVAL;
-	return 0;
 }
-EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output);
+EXPORT_SYMBOL_GPL(gpio_to_irq);
 
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 8d36f18..2f580fa 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -27,6 +27,7 @@
 
 #include <linux/types.h>
 #include <linux/ssb/ssb.h>
+#include <linux/ssb/ssb_embedded.h>
 #include <asm/bootinfo.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
@@ -41,7 +42,7 @@ static void bcm47xx_machine_restart(char *command)
 	printk(KERN_ALERT "Please stand by while rebooting the system...\n");
 	local_irq_disable();
 	/* Set the watchdog timer to reset immediately */
-	ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
+	ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
 	while (1)
 		cpu_relax();
 }
@@ -50,7 +51,7 @@ static void bcm47xx_machine_halt(void)
 {
 	/* Disable interrupts and watchdog and spin forever */
 	local_irq_disable();
-	ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
+	ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
 	while (1)
 		cpu_relax();
 }
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index cfc8f4d..d8ff4cd 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -9,47 +9,46 @@
 #ifndef __BCM47XX_GPIO_H
 #define __BCM47XX_GPIO_H
 
+#include <linux/ssb/ssb_embedded.h>
+#include <asm/mach-bcm47xx/bcm47xx.h>
+
 #define BCM47XX_EXTIF_GPIO_LINES	5
 #define BCM47XX_CHIPCO_GPIO_LINES	16
 
-extern int bcm47xx_gpio_to_irq(unsigned gpio);
-extern int bcm47xx_gpio_get_value(unsigned gpio);
-extern void bcm47xx_gpio_set_value(unsigned gpio, int value);
-extern int bcm47xx_gpio_direction_input(unsigned gpio);
-extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-       return 0;
-}
+extern int gpio_request(unsigned gpio, const char *label);
+extern void gpio_free(unsigned gpio);
+extern int gpio_to_irq(unsigned gpio);
 
-static inline void gpio_free(unsigned gpio)
+static inline int gpio_get_value(unsigned gpio)
 {
+	return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
 }
 
-static inline int gpio_to_irq(unsigned gpio)
+static inline void gpio_set_value(unsigned gpio, int value)
 {
-	return bcm47xx_gpio_to_irq(gpio);
+	ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
 }
 
-static inline int gpio_get_value(unsigned gpio)
+static inline int gpio_direction_input(unsigned gpio)
 {
-	return bcm47xx_gpio_get_value(gpio);
+	return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
 }
 
-static inline void gpio_set_value(unsigned gpio, int value)
+static inline int gpio_direction_output(unsigned gpio, int value)
 {
-	bcm47xx_gpio_set_value(gpio, value);
+	return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
 }
 
-static inline int gpio_direction_input(unsigned gpio)
+static int gpio_intmask(unsigned gpio, int value)
 {
-	return bcm47xx_gpio_direction_input(gpio);
+	return ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
+				value ? 1 << gpio : 0);
 }
 
-static inline int gpio_direction_output(unsigned gpio, int value)
+static int gpio_polarity(unsigned gpio, int value)
 {
-	return bcm47xx_gpio_direction_output(gpio, value);
+	return ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
+				 value ? 1 << gpio : 0);
 }
 
 
-- 
1.5.6.5

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

[PATCH 4/5] [MIPS] Add WGT634U reset button support

[Aurelien Jarno]

This patch adds support for the reset button of WGT634U machine, using
GPIO interrupts. Based on a patch from Michel Lespinasse.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 arch/mips/bcm47xx/wgt634u.c |   37 +++++++++++++++++++++++++++++++++++++
 1 files changed, 37 insertions(+), 0 deletions(-)

diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index f9e309a..db1a72f 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -11,6 +11,9 @@
 #include <linux/leds.h>
 #include <linux/mtd/physmap.h>
 #include <linux/ssb/ssb.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
+#include <asm/gpio.h>
 #include <asm/mach-bcm47xx/bcm47xx.h>
 
 /* GPIO definitions for the WGT634U */
@@ -99,6 +102,30 @@ static struct platform_device *wgt634u_devices[] __initdata = {
 	&wgt634u_gpio_leds,
 };
 
+static irqreturn_t gpio_interrupt(int irq, void *ignored)
+{
+	int state;
+
+	/* Interrupts are shared, check if the current one is
+	   a GPIO interrupt. */
+	if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
+				   SSB_CHIPCO_IRQ_GPIO))
+		return IRQ_NONE;
+
+	state = gpio_get_value(WGT634U_GPIO_RESET);
+
+	/* Interrupt are level triggered, revert the interrupt polarity
+	   to clear the interrupt. */
+	gpio_polarity(WGT634U_GPIO_RESET, state);
+
+	if (!state) {
+		printk(KERN_INFO "Reset button pressed");
+		ctrl_alt_del();
+	}
+
+	return IRQ_HANDLED;
+}
+
 static int __init wgt634u_init(void)
 {
 	/* There is no easy way to detect that we are running on a WGT634U
@@ -115,6 +142,16 @@ static int __init wgt634u_init(void)
 
 		printk(KERN_INFO "WGT634U machine detected.\n");
 
+		if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
+				 gpio_interrupt, IRQF_SHARED,
+				 "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
+			gpio_direction_input(WGT634U_GPIO_RESET);
+			gpio_intmask(WGT634U_GPIO_RESET, 1);
+			ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
+					    SSB_CHIPCO_IRQ_GPIO,
+					    SSB_CHIPCO_IRQ_GPIO);
+		}
+
 		wgt634u_flash_data.width = mcore->flash_buswidth;
 		wgt634u_flash_resource.start = mcore->flash_window;
 		wgt634u_flash_resource.end = mcore->flash_window
-- 
1.5.6.5


-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

[PATCH 5/5] [MIPS] Scan PCI busses when they are registered

[Aurelien Jarno]

The patch below changes register_pci_controller() such that controllers
being added after pcibios_init() has run are be scanned immediately.

This is needed for example by the BCM47xx PCI controller, which is
located on the SSB bus, which is now initialized after the PCI
subsystem.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 arch/mips/pci/pci.c |   80 +++++++++++++++++++++++++++++++++-----------------
 1 files changed, 53 insertions(+), 27 deletions(-)

diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index c7fe6ec..a377e9d 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -34,6 +34,8 @@ static struct pci_controller *hose_head, **hose_tail = &hose_head;
 unsigned long PCIBIOS_MIN_IO	= 0x0000;
 unsigned long PCIBIOS_MIN_MEM	= 0;
 
+static int pci_initialized;
+
 /*
  * We need to avoid collisions with `mirrored' VGA ports
  * and other strange ISA hardware, so we always want the
@@ -74,6 +76,42 @@ pcibios_align_resource(void *data, struct resource *res,
 	res->start = start;
 }
 
+static void __devinit pcibios_scanbus(struct pci_controller *hose)
+{
+	static int next_busno;
+	static int need_domain_info;
+	struct pci_bus *bus;
+
+	if (!hose->iommu)
+		PCI_DMA_BUS_IS_PHYS = 1;
+
+	if (hose->get_busno && pci_probe_only)
+		next_busno = (*hose->get_busno)();
+
+	bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
+	hose->bus = bus;
+
+	need_domain_info = need_domain_info || hose->index;
+	hose->need_domain_info = need_domain_info;
+	if (bus) {
+		next_busno = bus->subordinate + 1;
+		/* Don't allow 8-bit bus number overflow inside the hose -
+		   reserve some space for bridges. */
+		if (next_busno > 224) {
+			next_busno = 0;
+			need_domain_info = 1;
+		}
+
+		if (!pci_probe_only) {
+			pci_bus_size_bridges(bus);
+			pci_bus_assign_resources(bus);
+			pci_enable_bridges(bus);
+		}
+	}
+}
+
+static DEFINE_MUTEX(pci_scan_mutex);
+
 void __devinit register_pci_controller(struct pci_controller *hose)
 {
 	if (request_resource(&iomem_resource, hose->mem_resource) < 0)
@@ -93,6 +131,17 @@ void __devinit register_pci_controller(struct pci_controller *hose)
 		printk(KERN_WARNING
 		       "registering PCI controller with io_map_base unset\n");
 	}
+
+	/*
+	 * Scan the bus if it is register after the PCI subsystem
+	 * initialization.
+	 */
+	if (pci_initialized) {
+		mutex_lock(&pci_scan_mutex);
+		pcibios_scanbus(hose);
+		mutex_unlock(&pci_scan_mutex);
+	}
+
 	return;
 
 out:
@@ -125,38 +174,15 @@ static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
 static int __init pcibios_init(void)
 {
 	struct pci_controller *hose;
-	struct pci_bus *bus;
-	int next_busno;
-	int need_domain_info = 0;
 
 	/* Scan all of the recorded PCI controllers.  */
-	for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
-
-		if (!hose->iommu)
-			PCI_DMA_BUS_IS_PHYS = 1;
-
-		if (hose->get_busno && pci_probe_only)
-			next_busno = (*hose->get_busno)();
-
-		bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
-		hose->bus = bus;
-		need_domain_info = need_domain_info || hose->index;
-		hose->need_domain_info = need_domain_info;
-		if (bus) {
-			next_busno = bus->subordinate + 1;
-			/* Don't allow 8-bit bus number overflow inside the hose -
-			   reserve some space for bridges. */
-			if (next_busno > 224) {
-				next_busno = 0;
-				need_domain_info = 1;
-			}
-		}
-	}
+	for (hose = hose_head; hose; hose = hose->next)
+		pcibios_scanbus(hose);
 
-	if (!pci_probe_only)
-		pci_assign_unassigned_resources();
 	pci_fixup_irqs(common_swizzle, pcibios_map_irq);
 
+	pci_initialized = 1;
+
 	return 0;
 }
 
-- 
1.5.6.5


-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

Re: [PATCH 0/5] BCM47xx patches for 2.6.28

[Ralf Baechle]

On Tue, Oct 14, 2008 at 11:40:43AM +0200, Aurelien Jarno wrote:

>       [MIPS] WGT634U: Add machine detection message
>       [MIPS] Remove references to BCM947XX
>       [MIPS] BCM47xx: Use the new SSB GPIO API
>       [MIPS] Add WGT634U reset button support
>       [MIPS] Scan PCI busses when they are registered
> 
> Compared to the previous version, one patch has been merged, and the
> second patch has been updated to reflect the new location of this file.

Whole series applied with the changed of <asm/gpio.h> to <linux/gpio.h> as
discussed on IRC.

Thanks,

  Ralf