From: Ralf Baechle <ralf@linux-mips.org>
To: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org,
Tomaso Paoletti <tpaoletti@caviumnetworks.com>,
Paul Gortmaker <Paul.Gortmaker@windriver.com>
Subject: Re: [PATCH 15/36] Probe for Cavium OCTEON CPUs.
Date: Wed, 29 Oct 2008 17:10:15 +0000 [thread overview]
Message-ID: <20081029171015.GD26256@linux-mips.org> (raw)
In-Reply-To: <49088FF7.9060103@caviumnetworks.com>
On Wed, Oct 29, 2008 at 09:31:51AM -0700, David Daney wrote:
>> The watch bit is a standard feature of the MIPS R1/R2 architecture. What
>> Sandcraft did was bascially an RM7000 clone with some extensions. I'm
>> still trying to track somebody who could verify the correctness of that
>> code as I don't have Sandcraft docs ...
>>
>
> R4400 and R10K have the watch registers, but they do not have mips
> semantics, so are not currently usable with the watch register support.
> This is why I initially was very conservative about the conditions under
> which I probed watch registers. So I think it is good to try to verify
> these things.
All the esotheric stuff really is covered in cpu_probe_legacy. Anything
else should comply with MIPS32/MIPS64. Exceptions apply.
Thanks to an old advertisment leaflet I was able to find that the Sandcraft
SR71000 is indeed a MIPS64 processor, so the patch was right.
Ralf
next prev parent reply other threads:[~2008-10-29 17:10 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-27 23:58 [PATCH 00/36] Add Cavium OCTEON processor support (v2) David Daney
2008-10-28 0:02 ` [PATCH 01/36] Add Cavium OCTEON processor support files to arch/mips/cavium-octeon David Daney
2008-10-28 0:02 ` [PATCH 02/36] Add Cavium OCTEON files to arch/mips/include/asm/mach-cavium-octeon David Daney
2008-10-28 0:02 ` [PATCH 03/36] Add Cavium OCTEON processor support files to arch/mips/kernel David Daney
2008-10-28 0:02 ` [PATCH 04/36] Add Cavium OCTEON processor support files to arch/mips/mm David Daney
2008-10-28 0:02 ` [PATCH 05/36] Add Cavium OCTEON processor support files to and arch/mips/cavium-octeon/executive David Daney
2008-10-28 0:02 ` [PATCH 06/36] Add Cavium OCTEON processor CSR definitions David Daney
2008-10-28 0:02 ` [PATCH 07/36] Don't assume boot CPU is CPU0 if MIPS_DISABLE_BOOT_CPU_ZERO set David Daney
2008-10-28 0:02 ` [PATCH 08/36] For Cavium OCTEON handle hazards as per the R10000 handling David Daney
2008-10-28 0:02 ` [PATCH 09/36] Enable mips32 style bitops for Cavium OCTEON David Daney
2008-10-28 0:02 ` [PATCH 10/36] Cavium OCTEON: Set hwrena and lazily restore CP2 state David Daney
2008-10-28 0:02 ` [PATCH 11/36] MIPSR2 ebase isn't just CAC_BASE David Daney
2008-10-28 0:02 ` [PATCH 12/36] Add Cavium OCTEON to arch/mips/Kconfig David Daney
2008-10-28 0:02 ` [PATCH 13/36] Add Cavium OCTEON processor constants David Daney
2008-10-28 0:02 ` [PATCH 14/36] Rewrite cpu_to_name so it has one statement per line David Daney
2008-10-28 0:02 ` [PATCH 15/36] Probe for Cavium OCTEON CPUs David Daney
2008-10-28 0:02 ` [PATCH 16/36] MIPS: Hook Cavium OCTEON cache init into cache.c David Daney
2008-10-28 0:02 ` [PATCH 17/36] cavium: Hook Cavium specifics into main arch/mips dir David Daney
2008-10-28 0:02 ` [PATCH 18/36] Cavium OCTEON modify core io.h macros to account for the Octeon Errata Core-301 David Daney
2008-10-28 0:02 ` [PATCH 19/36] Cavium OCTEON: increase MAX_DMA address David Daney
2008-10-28 0:02 ` [PATCH 20/36] Cavium OCTEON: add in icache and dcache error functions David Daney
2008-10-28 0:02 ` [PATCH 21/36] Cavium OCTEON: Add cop2/cvmseg state entries to processor.h David Daney
2008-10-28 0:02 ` [PATCH 22/36] Add Cavium OCTEON specific registers to ptrace.h and asm-offsets.c David Daney
2008-10-28 0:02 ` [PATCH 23/36] Add SMP_ICACHE_FLUSH for the Cavium CPU family David Daney
2008-10-28 0:02 ` [PATCH 24/36] Cavium OCTEON: PT vs MFC0 reorder, multiplier state preservation David Daney
2008-10-28 0:02 ` [PATCH 25/36] Add Cavium OCTEON irq hazard in asmmacro.h David Daney
2008-10-28 0:02 ` [PATCH 26/36] Compute branch returns for Cavium OCTEON specific branch instructions David Daney
2008-10-28 0:02 ` [PATCH 27/36] Add Cavium OCTEON slot into proper tlb category David Daney
2008-10-28 0:03 ` [PATCH 28/36] MIPS: move FPU emulator externs to fpu_emulator.h David Daney
2008-10-28 0:03 ` [PATCH 29/36] Cavium OCTEON FPU EMU exception as TLB exception David Daney
2008-10-28 16:06 ` Ralf Baechle
2008-10-30 11:44 ` [PATCH 17/36] cavium: Hook Cavium specifics into main arch/mips dir Ralf Baechle
2008-10-29 12:17 ` [PATCH 15/36] Probe for Cavium OCTEON CPUs Ralf Baechle
2008-10-29 16:18 ` David Daney
2008-10-29 16:26 ` Ralf Baechle
2008-10-29 16:31 ` David Daney
2008-10-29 17:10 ` Ralf Baechle [this message]
2008-10-29 19:24 ` Maciej W. Rozycki
2008-10-29 17:38 ` Sergei Shtylyov
2008-10-28 9:56 ` [PATCH 11/36] MIPSR2 ebase isn't just CAC_BASE Ralf Baechle
2008-10-28 16:05 ` Maciej W. Rozycki
2008-10-28 16:13 ` Chad Reese
2008-10-28 16:13 ` Chad Reese
2008-10-28 16:27 ` Ralf Baechle
2008-10-28 17:29 ` Maciej W. Rozycki
2008-10-29 7:38 ` Brian Foster
2008-10-28 16:21 ` Ralf Baechle
2008-10-28 17:30 ` Maciej W. Rozycki
2008-10-28 7:30 ` [PATCH 09/36] Enable mips32 style bitops for Cavium OCTEON Ralf Baechle
2008-10-28 6:47 ` [PATCH 07/36] Don't assume boot CPU is CPU0 if MIPS_DISABLE_BOOT_CPU_ZERO set Ralf Baechle
2008-10-28 16:43 ` David Daney
2008-10-28 17:28 ` Ralf Baechle
2008-10-29 18:45 ` [PATCH 06/36] Add Cavium OCTEON processor CSR definitions Christoph Hellwig
2008-10-29 19:18 ` David Daney
2008-10-29 19:27 ` Christoph Hellwig
2008-10-29 20:53 ` Chad Reese
2008-10-30 11:13 ` Ralf Baechle
2008-10-30 18:21 ` David Daney
2008-10-30 18:45 ` Chad Reese
2008-10-29 18:45 ` [PATCH 05/36] Add Cavium OCTEON processor support files to and arch/mips/cavium-octeon/executive Christoph Hellwig
2008-10-29 23:03 ` Sergei Shtylyov
2008-10-30 17:19 ` Christoph Hellwig
2008-10-30 18:23 ` Sergei Shtylyov
2008-10-30 22:16 ` Christoph Hellwig
2008-10-29 16:07 ` [PATCH 04/36] Add Cavium OCTEON processor support files to arch/mips/mm Ralf Baechle
2008-10-29 16:25 ` David Daney
2008-10-29 18:09 ` Ralf Baechle
2008-10-30 21:17 ` David Daney
2008-10-28 7:57 ` [PATCH 02/36] Add Cavium OCTEON files to arch/mips/include/asm/mach-cavium-octeon Ralf Baechle
2008-10-28 10:36 ` Sergei Shtylyov
2008-10-28 16:02 ` Maciej W. Rozycki
2008-10-28 16:17 ` Ralf Baechle
2008-10-28 17:24 ` Maciej W. Rozycki
2008-10-28 23:51 ` David Daney
2008-10-29 1:29 ` Ralf Baechle
2008-10-28 0:04 ` [PATCH 30/36] Don't clobber spinlocks in 8250 David Daney
2008-10-28 0:04 ` [PATCH 31/36] Generic 8250 serial driver changes to support future OCTEON serial patches David Daney
2008-10-28 0:04 ` [PATCH 32/36] Allow port type to be specified when calling serial8250_register_port David Daney
2008-10-28 0:04 ` [PATCH 33/36] Allow port type to specify bugs that are not probed for David Daney
2008-10-28 0:04 ` [PATCH 34/36] 8250 serial driver changes for Cavium OCTEON David Daney
2008-10-28 0:04 ` [PATCH 35/36] Adjust the dma-common.c platform hooks David Daney
2008-10-28 0:04 ` [PATCH 36/36] Add defconfig for Cavium OCTEON David Daney
2008-10-29 19:15 ` [PATCH 00/36] Add Cavium OCTEON processor support (v2) Maciej W. Rozycki
2008-10-30 15:01 ` Chris Friesen
2008-11-04 14:48 ` Maciej W. Rozycki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20081029171015.GD26256@linux-mips.org \
--to=ralf@linux-mips.org \
--cc=Paul.Gortmaker@windriver.com \
--cc=ddaney@caviumnetworks.com \
--cc=linux-mips@linux-mips.org \
--cc=tpaoletti@caviumnetworks.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox