From: Ralf Baechle <ralf@linux-mips.org>
To: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org,
Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Subject: Re: [PATCH 17/36] cavium: Hook Cavium specifics into main arch/mips dir
Date: Thu, 30 Oct 2008 11:44:25 +0000 [thread overview]
Message-ID: <20081030114425.GG26256@linux-mips.org> (raw)
In-Reply-To: <1225152181-3221-17-git-send-email-ddaney@caviumnetworks.com>
On Mon, Oct 27, 2008 at 05:02:49PM -0700, David Daney wrote:
> diff --git a/arch/mips/Makefile b/arch/mips/Makefile
> index 28c55f6..0addc84 100644
> --- a/arch/mips/Makefile
> +++ b/arch/mips/Makefile
> @@ -144,6 +144,7 @@ cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
> cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
> cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
> -Wa,--trap
> +cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -march=octeon -Wa,--trap
One if my standard requirements is that contributions must build and work
with a standard FSF toolchain. Browny points for building with even older
tools chains - the oldest supported versions are gcc 3.2 for 32-bit and
gcc 3.3 for 64-bit.
Latest binutils 2.19 (releast on 2008-10-27) have added Cavium support but
gcc 4.3 doesn't have that yet. So you can try something like:
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon,-march=mips64r2) -Wa,--trap
> +core-$(CONFIG_CPU_CAVIUM_OCTEON) += arch/mips/cavium-octeon/executive/
-fkeep-ceo-inline ;-)
> +ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
> +load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff84100000
> +else
> +load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000
> +endif
I'm thinking about a more elegant solution for this. PIC code sucks a blue
whale through a dialysis filter so I hope we can find something better.
Until then this is certainly acceptable.
> diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
> index b1372c2..93ff9c4 100644
> --- a/arch/mips/kernel/Makefile
> +++ b/arch/mips/kernel/Makefile
> @@ -43,6 +43,7 @@ obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o
> obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o
> obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o
> obj-$(CONFIG_CPU_VR41XX) += r4k_fpu.o r4k_switch.o
> +obj-$(CONFIG_CPU_CAVIUM_OCTEON) += octeon_switch.o
I guess you could just use the normal r4k_fpu.o r4k_switch.o here and handle
the rest of the Cavium bits like other non-standard architecture features
in switch_to() and finish_arch_switch:
#define switch_to(prev, next, last) \
do { \
__mips_mt_fpaff_switch_to(prev); \
if (cpu_has_dsp) \
__save_dsp(prev); \
if (cpu_has_cavium) \
__save_cavium_stuff(prev); \
(last) = resume(prev, next, task_thread_info(next)); \
} while (0)
#define finish_arch_switch(prev) \
do { \
if (cpu_has_cavium) \
__restore_cavium_stuff(prev); \
if (cpu_has_dsp) \
__restore_dsp(current); \
if (cpu_has_userlocal) \
write_c0_userlocal(current_thread_info()->tp_value); \
__restore_watch(); \
} while (0)
?
> +CFLAGS_ptrace.o = -I$(OCTEON_ROOT)/executive
Huh?
> obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o tlb-r4k.o
> obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o tlb-r4k.o
> +obj-$(CONFIG_CPU_CAVIUM_OCTEON) += c-octeon.o cex-oct.o tlb-r4k.o
>
> obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
> obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
> @@ -34,3 +35,7 @@ obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
> obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o
>
> EXTRA_CFLAGS += -Werror
> +
> +OCTEON_ROOT = $(srctree)/arch/mips/cavium-octeon
> +CFLAGS_c-octeon.o = -I$(OCTEON_ROOT)/executive
I've not noticed anything in c-octeon.c which would require this -I flag.
Ralf
next prev parent reply other threads:[~2008-10-30 11:44 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-27 23:58 [PATCH 00/36] Add Cavium OCTEON processor support (v2) David Daney
2008-10-28 0:02 ` [PATCH 01/36] Add Cavium OCTEON processor support files to arch/mips/cavium-octeon David Daney
2008-10-28 0:02 ` [PATCH 02/36] Add Cavium OCTEON files to arch/mips/include/asm/mach-cavium-octeon David Daney
2008-10-28 0:02 ` [PATCH 03/36] Add Cavium OCTEON processor support files to arch/mips/kernel David Daney
2008-10-28 0:02 ` [PATCH 04/36] Add Cavium OCTEON processor support files to arch/mips/mm David Daney
2008-10-28 0:02 ` [PATCH 05/36] Add Cavium OCTEON processor support files to and arch/mips/cavium-octeon/executive David Daney
2008-10-28 0:02 ` [PATCH 06/36] Add Cavium OCTEON processor CSR definitions David Daney
2008-10-28 0:02 ` [PATCH 07/36] Don't assume boot CPU is CPU0 if MIPS_DISABLE_BOOT_CPU_ZERO set David Daney
2008-10-28 0:02 ` [PATCH 08/36] For Cavium OCTEON handle hazards as per the R10000 handling David Daney
2008-10-28 0:02 ` [PATCH 09/36] Enable mips32 style bitops for Cavium OCTEON David Daney
2008-10-28 0:02 ` [PATCH 10/36] Cavium OCTEON: Set hwrena and lazily restore CP2 state David Daney
2008-10-28 0:02 ` [PATCH 11/36] MIPSR2 ebase isn't just CAC_BASE David Daney
2008-10-28 0:02 ` [PATCH 12/36] Add Cavium OCTEON to arch/mips/Kconfig David Daney
2008-10-28 0:02 ` [PATCH 13/36] Add Cavium OCTEON processor constants David Daney
2008-10-28 0:02 ` [PATCH 14/36] Rewrite cpu_to_name so it has one statement per line David Daney
2008-10-28 0:02 ` [PATCH 15/36] Probe for Cavium OCTEON CPUs David Daney
2008-10-28 0:02 ` [PATCH 16/36] MIPS: Hook Cavium OCTEON cache init into cache.c David Daney
2008-10-28 0:02 ` [PATCH 17/36] cavium: Hook Cavium specifics into main arch/mips dir David Daney
2008-10-28 0:02 ` [PATCH 18/36] Cavium OCTEON modify core io.h macros to account for the Octeon Errata Core-301 David Daney
2008-10-28 0:02 ` [PATCH 19/36] Cavium OCTEON: increase MAX_DMA address David Daney
2008-10-28 0:02 ` [PATCH 20/36] Cavium OCTEON: add in icache and dcache error functions David Daney
2008-10-28 0:02 ` [PATCH 21/36] Cavium OCTEON: Add cop2/cvmseg state entries to processor.h David Daney
2008-10-28 0:02 ` [PATCH 22/36] Add Cavium OCTEON specific registers to ptrace.h and asm-offsets.c David Daney
2008-10-28 0:02 ` [PATCH 23/36] Add SMP_ICACHE_FLUSH for the Cavium CPU family David Daney
2008-10-28 0:02 ` [PATCH 24/36] Cavium OCTEON: PT vs MFC0 reorder, multiplier state preservation David Daney
2008-10-28 0:02 ` [PATCH 25/36] Add Cavium OCTEON irq hazard in asmmacro.h David Daney
2008-10-28 0:02 ` [PATCH 26/36] Compute branch returns for Cavium OCTEON specific branch instructions David Daney
2008-10-28 0:02 ` [PATCH 27/36] Add Cavium OCTEON slot into proper tlb category David Daney
2008-10-28 0:03 ` [PATCH 28/36] MIPS: move FPU emulator externs to fpu_emulator.h David Daney
2008-10-28 0:03 ` [PATCH 29/36] Cavium OCTEON FPU EMU exception as TLB exception David Daney
2008-10-28 16:06 ` Ralf Baechle
2008-10-30 11:44 ` Ralf Baechle [this message]
2008-10-29 12:17 ` [PATCH 15/36] Probe for Cavium OCTEON CPUs Ralf Baechle
2008-10-29 16:18 ` David Daney
2008-10-29 16:26 ` Ralf Baechle
2008-10-29 16:31 ` David Daney
2008-10-29 17:10 ` Ralf Baechle
2008-10-29 19:24 ` Maciej W. Rozycki
2008-10-29 17:38 ` Sergei Shtylyov
2008-10-28 9:56 ` [PATCH 11/36] MIPSR2 ebase isn't just CAC_BASE Ralf Baechle
2008-10-28 16:05 ` Maciej W. Rozycki
2008-10-28 16:13 ` Chad Reese
2008-10-28 16:13 ` Chad Reese
2008-10-28 16:27 ` Ralf Baechle
2008-10-28 17:29 ` Maciej W. Rozycki
2008-10-29 7:38 ` Brian Foster
2008-10-28 16:21 ` Ralf Baechle
2008-10-28 17:30 ` Maciej W. Rozycki
2008-10-28 7:30 ` [PATCH 09/36] Enable mips32 style bitops for Cavium OCTEON Ralf Baechle
2008-10-28 6:47 ` [PATCH 07/36] Don't assume boot CPU is CPU0 if MIPS_DISABLE_BOOT_CPU_ZERO set Ralf Baechle
2008-10-28 16:43 ` David Daney
2008-10-28 17:28 ` Ralf Baechle
2008-10-29 18:45 ` [PATCH 06/36] Add Cavium OCTEON processor CSR definitions Christoph Hellwig
2008-10-29 19:18 ` David Daney
2008-10-29 19:27 ` Christoph Hellwig
2008-10-29 20:53 ` Chad Reese
2008-10-30 11:13 ` Ralf Baechle
2008-10-30 18:21 ` David Daney
2008-10-30 18:45 ` Chad Reese
2008-10-29 18:45 ` [PATCH 05/36] Add Cavium OCTEON processor support files to and arch/mips/cavium-octeon/executive Christoph Hellwig
2008-10-29 23:03 ` Sergei Shtylyov
2008-10-30 17:19 ` Christoph Hellwig
2008-10-30 18:23 ` Sergei Shtylyov
2008-10-30 22:16 ` Christoph Hellwig
2008-10-29 16:07 ` [PATCH 04/36] Add Cavium OCTEON processor support files to arch/mips/mm Ralf Baechle
2008-10-29 16:25 ` David Daney
2008-10-29 18:09 ` Ralf Baechle
2008-10-30 21:17 ` David Daney
2008-10-28 7:57 ` [PATCH 02/36] Add Cavium OCTEON files to arch/mips/include/asm/mach-cavium-octeon Ralf Baechle
2008-10-28 10:36 ` Sergei Shtylyov
2008-10-28 16:02 ` Maciej W. Rozycki
2008-10-28 16:17 ` Ralf Baechle
2008-10-28 17:24 ` Maciej W. Rozycki
2008-10-28 23:51 ` David Daney
2008-10-29 1:29 ` Ralf Baechle
2008-10-28 0:04 ` [PATCH 30/36] Don't clobber spinlocks in 8250 David Daney
2008-10-28 0:04 ` [PATCH 31/36] Generic 8250 serial driver changes to support future OCTEON serial patches David Daney
2008-10-28 0:04 ` [PATCH 32/36] Allow port type to be specified when calling serial8250_register_port David Daney
2008-10-28 0:04 ` [PATCH 33/36] Allow port type to specify bugs that are not probed for David Daney
2008-10-28 0:04 ` [PATCH 34/36] 8250 serial driver changes for Cavium OCTEON David Daney
2008-10-28 0:04 ` [PATCH 35/36] Adjust the dma-common.c platform hooks David Daney
2008-10-28 0:04 ` [PATCH 36/36] Add defconfig for Cavium OCTEON David Daney
2008-10-29 19:15 ` [PATCH 00/36] Add Cavium OCTEON processor support (v2) Maciej W. Rozycki
2008-10-30 15:01 ` Chris Friesen
2008-11-04 14:48 ` Maciej W. Rozycki
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