* [60/68] MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations.
[not found] <20100924163357.GA15741@kroah.com>
@ 2010-09-24 16:32 ` Greg KH
2010-09-24 16:32 ` [61/68] MIPS: Set io_map_base for several PCI bridges lacking it Greg KH
1 sibling, 0 replies; 2+ messages in thread
From: Greg KH @ 2010-09-24 16:32 UTC (permalink / raw)
To: linux-kernel, stable, linux-mips
Cc: stable-review, torvalds, akpm, alan, David Daney, Ralf Baechle
2.6.32-stable review patch. If anyone has any objections, please let us know.
------------------
From: David Daney <ddaney@caviumnetworks.com>
commit f2a68272d799bf4092443357142f63b74f7669a1 upstream.
For 64-bit, we must use DADDU and DSUBU.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1483/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
---
arch/mips/include/asm/atomic.h | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -434,7 +434,7 @@ static __inline__ void atomic64_add(long
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %0, %1 # atomic64_add \n"
- " addu %0, %2 \n"
+ " daddu %0, %2 \n"
" scd %0, %1 \n"
" beqzl %0, 1b \n"
" .set mips0 \n"
@@ -446,7 +446,7 @@ static __inline__ void atomic64_add(long
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %0, %1 # atomic64_add \n"
- " addu %0, %2 \n"
+ " daddu %0, %2 \n"
" scd %0, %1 \n"
" beqz %0, 2f \n"
" .subsection 2 \n"
@@ -479,7 +479,7 @@ static __inline__ void atomic64_sub(long
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %0, %1 # atomic64_sub \n"
- " subu %0, %2 \n"
+ " dsubu %0, %2 \n"
" scd %0, %1 \n"
" beqzl %0, 1b \n"
" .set mips0 \n"
@@ -491,7 +491,7 @@ static __inline__ void atomic64_sub(long
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %0, %1 # atomic64_sub \n"
- " subu %0, %2 \n"
+ " dsubu %0, %2 \n"
" scd %0, %1 \n"
" beqz %0, 2f \n"
" .subsection 2 \n"
@@ -524,10 +524,10 @@ static __inline__ long atomic64_add_retu
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %1, %2 # atomic64_add_return \n"
- " addu %0, %1, %3 \n"
+ " daddu %0, %1, %3 \n"
" scd %0, %2 \n"
" beqzl %0, 1b \n"
- " addu %0, %1, %3 \n"
+ " daddu %0, %1, %3 \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
@@ -538,10 +538,10 @@ static __inline__ long atomic64_add_retu
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %1, %2 # atomic64_add_return \n"
- " addu %0, %1, %3 \n"
+ " daddu %0, %1, %3 \n"
" scd %0, %2 \n"
" beqz %0, 2f \n"
- " addu %0, %1, %3 \n"
+ " daddu %0, %1, %3 \n"
" .subsection 2 \n"
"2: b 1b \n"
" .previous \n"
@@ -576,10 +576,10 @@ static __inline__ long atomic64_sub_retu
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %1, %2 # atomic64_sub_return \n"
- " subu %0, %1, %3 \n"
+ " dsubu %0, %1, %3 \n"
" scd %0, %2 \n"
" beqzl %0, 1b \n"
- " subu %0, %1, %3 \n"
+ " dsubu %0, %1, %3 \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
@@ -590,10 +590,10 @@ static __inline__ long atomic64_sub_retu
__asm__ __volatile__(
" .set mips3 \n"
"1: lld %1, %2 # atomic64_sub_return \n"
- " subu %0, %1, %3 \n"
+ " dsubu %0, %1, %3 \n"
" scd %0, %2 \n"
" beqz %0, 2f \n"
- " subu %0, %1, %3 \n"
+ " dsubu %0, %1, %3 \n"
" .subsection 2 \n"
"2: b 1b \n"
" .previous \n"
^ permalink raw reply [flat|nested] 2+ messages in thread
* [61/68] MIPS: Set io_map_base for several PCI bridges lacking it
[not found] <20100924163357.GA15741@kroah.com>
2010-09-24 16:32 ` [60/68] MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations Greg KH
@ 2010-09-24 16:32 ` Greg KH
1 sibling, 0 replies; 2+ messages in thread
From: Greg KH @ 2010-09-24 16:32 UTC (permalink / raw)
To: linux-kernel, stable
Cc: stable-review, torvalds, akpm, alan, Ben Hutchings, linux-mips,
Martin Michlmayr, Aurelien Jarno, 584784, Ralf Baechle
2.6.32-stable review patch. If anyone has any objections, please let us know.
------------------
From: Ben Hutchings <ben@decadent.org.uk>
commit 8faf2e6c201d95b780cd3b4674b7a55ede6dcbbb upstream.
Several MIPS platforms don't set pci_controller::io_map_base for their
PCI bridges. This results in a panic in pci_iomap(). (The panic is
conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI
MIPS systems.)
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: linux-mips@linux-mips.org
Cc: Martin Michlmayr <tbm@cyrius.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: 584784@bugs.debian.org
Patchwork: https://patchwork.linux-mips.org/patch/1377/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
---
arch/mips/mti-malta/malta-pci.c | 2 ++
arch/mips/nxp/pnx8550/common/pci.c | 1 +
arch/mips/nxp/pnx8550/common/setup.c | 2 +-
arch/mips/pci/ops-pmcmsp.c | 1 +
arch/mips/pci/pci-yosemite.c | 1 +
5 files changed, 6 insertions(+), 1 deletion(-)
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -247,6 +247,8 @@ void __init mips_pcibios_init(void)
iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
ioport_resource.end = controller->io_resource->end;
+ controller->io_map_base = mips_io_port_base;
+
register_pci_controller(controller);
}
--- a/arch/mips/nxp/pnx8550/common/pci.c
+++ b/arch/mips/nxp/pnx8550/common/pci.c
@@ -44,6 +44,7 @@ extern struct pci_ops pnx8550_pci_ops;
static struct pci_controller pnx8550_controller = {
.pci_ops = &pnx8550_pci_ops,
+ .io_map_base = PNX8550_PORT_BASE,
.io_resource = &pci_io_resource,
.mem_resource = &pci_mem_resource,
};
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ b/arch/mips/nxp/pnx8550/common/setup.c
@@ -113,7 +113,7 @@ void __init plat_mem_setup(void)
PNX8550_GLB2_ENAB_INTA_O = 0;
/* IO/MEM resources. */
- set_io_port_base(KSEG1);
+ set_io_port_base(PNX8550_PORT_BASE);
ioport_resource.start = 0;
ioport_resource.end = ~0;
iomem_resource.start = 0;
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -944,6 +944,7 @@ static struct pci_controller msp_pci_con
.pci_ops = &msp_pci_ops,
.mem_resource = &pci_mem_resource,
.mem_offset = 0,
+ .io_map_base = MSP_PCI_IOSPACE_BASE,
.io_resource = &pci_io_resource,
.io_offset = 0
};
--- a/arch/mips/pci/pci-yosemite.c
+++ b/arch/mips/pci/pci-yosemite.c
@@ -54,6 +54,7 @@ static int __init pmc_yosemite_setup(voi
panic(ioremap_failed);
set_io_port_base(io_v_base);
+ py_controller.io_map_base = io_v_base;
TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
ioport_resource.end = TITAN_IO_SIZE - 1;
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2010-09-24 16:36 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <20100924163357.GA15741@kroah.com>
2010-09-24 16:32 ` [60/68] MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations Greg KH
2010-09-24 16:32 ` [61/68] MIPS: Set io_map_base for several PCI bridges lacking it Greg KH
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox