From: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Subject: [patch 25/38] mips: pmc-sierra: Convert to new irq_chip functions
Date: Wed, 23 Mar 2011 21:09:06 -0000 [thread overview]
Message-ID: <20110323210536.937910772@linutronix.de> (raw)
In-Reply-To: 20110323210437.398062704@linutronix.de
[-- Attachment #1: misp-pmc.patch --]
[-- Type: text/plain, Size: 9517 bytes --]
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c | 41 +++++---------
arch/mips/pmc-sierra/msp71xx/msp_irq_per.c | 80 ++++++-----------------------
arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c | 18 ++++--
3 files changed, 46 insertions(+), 93 deletions(-)
Index: linux-mips-next/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
===================================================================
--- linux-mips-next.orig/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
+++ linux-mips-next/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c
@@ -77,7 +77,7 @@ static inline void cic_wmb(void)
dummy_read++;
}
-static inline void unmask_cic_irq(unsigned int irq)
+static void unmask_cic_irq(struct irq_data *d)
{
volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG;
int vpe;
@@ -89,18 +89,18 @@ static inline void unmask_cic_irq(unsign
* Make sure we have IRQ affinity. It may have changed while
* we were processing the IRQ.
*/
- if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity))
+ if (!cpumask_test_cpu(smp_processor_id(), d->affinity))
return;
#endif
vpe = get_current_vpe();
LOCK_VPE(flags, mtflags);
- cic_msk_reg[vpe] |= (1 << (irq - MSP_CIC_INTBASE));
+ cic_msk_reg[vpe] |= (1 << (d->irq - MSP_CIC_INTBASE));
UNLOCK_VPE(flags, mtflags);
cic_wmb();
}
-static inline void mask_cic_irq(unsigned int irq)
+static void mask_cic_irq(struct irq_data *d)
{
volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG;
int vpe = get_current_vpe();
@@ -108,33 +108,27 @@ static inline void mask_cic_irq(unsigned
unsigned long flags, mtflags;
#endif
LOCK_VPE(flags, mtflags);
- cic_msk_reg[vpe] &= ~(1 << (irq - MSP_CIC_INTBASE));
+ cic_msk_reg[vpe] &= ~(1 << (d->irq - MSP_CIC_INTBASE));
UNLOCK_VPE(flags, mtflags);
cic_wmb();
}
-static inline void msp_cic_irq_ack(unsigned int irq)
+static void msp_cic_irq_ack(struct irq_data *d)
{
- mask_cic_irq(irq);
+ mask_cic_irq(d);
/*
* Only really necessary for 18, 16-14 and sometimes 3:0
* (since these can be edge sensitive) but it doesn't
* hurt for the others
*/
- *CIC_STS_REG = (1 << (irq - MSP_CIC_INTBASE));
- smtc_im_ack_irq(irq);
-}
-
-static void msp_cic_irq_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- unmask_cic_irq(irq);
+ *CIC_STS_REG = (1 << (d->irq - MSP_CIC_INTBASE));
+ smtc_im_ack_irq(d->irq);
}
/*Note: Limiting to VSMP . Not tested in SMTC */
#ifdef CONFIG_MIPS_MT_SMP
-static inline int msp_cic_irq_set_affinity(unsigned int irq,
- const struct cpumask *cpumask)
+static int msp_cic_irq_set_affinity(struct irq_data *d,
+ const struct cpumask *cpumask, bool force)
{
int cpu;
unsigned long flags;
@@ -163,13 +157,12 @@ static inline int msp_cic_irq_set_affini
static struct irq_chip msp_cic_irq_controller = {
.name = "MSP_CIC",
- .mask = mask_cic_irq,
- .mask_ack = msp_cic_irq_ack,
- .unmask = unmask_cic_irq,
- .ack = msp_cic_irq_ack,
- .end = msp_cic_irq_end,
+ .irq_mask = mask_cic_irq,
+ .irq_mask_ack = msp_cic_irq_ack,
+ .irq_unmask = unmask_cic_irq,
+ .irq_ack = msp_cic_irq_ack,
#ifdef CONFIG_MIPS_MT_SMP
- .set_affinity = msp_cic_irq_set_affinity,
+ .irq_set_affinity = msp_cic_irq_set_affinity,
#endif
};
@@ -220,7 +213,5 @@ void msp_cic_irq_dispatch(void)
do_IRQ(ffs(pending) + MSP_CIC_INTBASE - 1);
} else{
spurious_interrupt();
- /* Re-enable the CIC cascaded interrupt. */
- irq_desc[MSP_INT_CIC].chip->end(MSP_INT_CIC);
}
}
Index: linux-mips-next/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
===================================================================
--- linux-mips-next.orig/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
+++ linux-mips-next/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c
@@ -48,100 +48,61 @@ static inline void per_wmb(void)
dummy_read++;
}
-static inline void unmask_per_irq(unsigned int irq)
+static inline void unmask_per_irq(struct irq_data *d)
{
#ifdef CONFIG_SMP
unsigned long flags;
spin_lock_irqsave(&per_lock, flags);
- *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
+ *PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE));
spin_unlock_irqrestore(&per_lock, flags);
#else
- *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
+ *PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE));
#endif
per_wmb();
}
-static inline void mask_per_irq(unsigned int irq)
+static inline void mask_per_irq(struct irq_data *d)
{
#ifdef CONFIG_SMP
unsigned long flags;
spin_lock_irqsave(&per_lock, flags);
- *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
+ *PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE));
spin_unlock_irqrestore(&per_lock, flags);
#else
- *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
+ *PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE));
#endif
per_wmb();
}
-static inline void msp_per_irq_enable(unsigned int irq)
+static inline void msp_per_irq_ack(struct irq_data *d)
{
- unmask_per_irq(irq);
-}
-
-static inline void msp_per_irq_disable(unsigned int irq)
-{
- mask_per_irq(irq);
-}
-
-static unsigned int msp_per_irq_startup(unsigned int irq)
-{
- msp_per_irq_enable(irq);
- return 0;
-}
-
-#define msp_per_irq_shutdown msp_per_irq_disable
-
-static inline void msp_per_irq_ack(unsigned int irq)
-{
- mask_per_irq(irq);
+ mask_per_irq(d);
/*
* In the PER interrupt controller, only bits 11 and 10
* are write-to-clear, (SPI TX complete, SPI RX complete).
* It does nothing for any others.
*/
-
- *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
-
- /* Re-enable the CIC cascaded interrupt and return */
- irq_desc[MSP_INT_CIC].chip->end(MSP_INT_CIC);
-}
-
-static void msp_per_irq_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- unmask_per_irq(irq);
+ *PER_INT_STS_REG = (1 << (d->irq - MSP_PER_INTBASE));
}
#ifdef CONFIG_SMP
-static inline int msp_per_irq_set_affinity(unsigned int irq,
- const struct cpumask *affinity)
+static int msp_per_irq_set_affinity(struct irq_data *d,
+ const struct cpumask *affinity, bool force)
{
- unsigned long flags;
- /*
- * Calls to ack, end, startup, enable are spinlocked in setup_irq and
- * __do_IRQ.Callers of this function do not spinlock,so we need to
- * do so ourselves.
- */
- raw_spin_lock_irqsave(&irq_desc[irq].lock, flags);
- msp_per_irq_enable(irq);
- raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
+ /* WTF is this doing ????? */
+ unmask_per_irq(d);
return 0;
-
}
#endif
static struct irq_chip msp_per_irq_controller = {
.name = "MSP_PER",
- .startup = msp_per_irq_startup,
- .shutdown = msp_per_irq_shutdown,
- .enable = msp_per_irq_enable,
- .disable = msp_per_irq_disable,
+ .irq_enable = unmask_per_irq.
+ .irq_disable = mask_per_irq,
+ .irq_ack = msp_per_irq_ack,
#ifdef CONFIG_SMP
- .set_affinity = msp_per_irq_set_affinity,
+ .irq_set_affinity = msp_per_irq_set_affinity,
#endif
- .ack = msp_per_irq_ack,
- .end = msp_per_irq_end,
};
void __init msp_per_irq_init(void)
@@ -152,10 +113,7 @@ void __init msp_per_irq_init(void)
*PER_INT_STS_REG = 0xFFFFFFFF;
/* initialize all the IRQ descriptors */
for (i = MSP_PER_INTBASE; i < MSP_PER_INTBASE + 32; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = NULL;
- irq_desc[i].depth = 1;
- irq_desc[i].chip = &msp_per_irq_controller;
+ irq_set_chip(i, &msp_per_irq_controller);
#ifdef CONFIG_MIPS_MT_SMTC
irq_hwmask[i] = C_IRQ4;
#endif
@@ -173,7 +131,5 @@ void msp_per_irq_dispatch(void)
do_IRQ(ffs(pending) + MSP_PER_INTBASE - 1);
} else {
spurious_interrupt();
- /* Re-enable the CIC cascaded interrupt and return */
- irq_desc[MSP_INT_CIC].chip->end(MSP_INT_CIC);
}
}
Index: linux-mips-next/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
===================================================================
--- linux-mips-next.orig/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
+++ linux-mips-next/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c
@@ -21,8 +21,10 @@
#include <msp_slp_int.h>
#include <msp_regs.h>
-static inline void unmask_msp_slp_irq(unsigned int irq)
+static inline void unmask_msp_slp_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
@@ -30,8 +32,10 @@ static inline void unmask_msp_slp_irq(un
*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
}
-static inline void mask_msp_slp_irq(unsigned int irq)
+static inline void mask_msp_slp_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
@@ -43,8 +47,10 @@ static inline void mask_msp_slp_irq(unsi
* While we ack the interrupt interrupts are disabled and thus we don't need
* to deal with concurrency issues. Same for msp_slp_irq_end.
*/
-static inline void ack_msp_slp_irq(unsigned int irq)
+static inline void ack_msp_slp_irq(struct irq_data *d)
{
+ unsigned int irq = d->irq;
+
/* check for PER interrupt range */
if (irq < MSP_PER_INTBASE)
*SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
@@ -54,9 +60,9 @@ static inline void ack_msp_slp_irq(unsig
static struct irq_chip msp_slp_irq_controller = {
.name = "MSP_SLP",
- .ack = ack_msp_slp_irq,
- .mask = mask_msp_slp_irq,
- .unmask = unmask_msp_slp_irq,
+ .irq_ack = ack_msp_slp_irq,
+ .irq_mask = mask_msp_slp_irq,
+ .irq_unmask = unmask_msp_slp_irq,
};
void __init msp_slp_irq_init(void)
next prev parent reply other threads:[~2011-03-23 21:18 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-23 21:08 [patch 00/38] mips: irq chip overhaul and cleanup Thomas Gleixner
2011-03-23 21:08 ` [patch 01/38] mips; Convert alchemy to new irq chip functions Thomas Gleixner
2011-03-24 7:41 ` Manuel Lauss
2011-03-24 8:14 ` Thomas Gleixner
2011-03-24 14:06 ` Ralf Baechle
2011-03-23 21:08 ` [patch 02/38] mips: ar7: Convert to new irq_chip functions Thomas Gleixner
2011-03-24 14:09 ` Ralf Baechle
2011-03-23 21:08 ` [patch 04/38] mips: bcm63xx: " Thomas Gleixner
2011-03-24 14:10 ` Ralf Baechle
2011-03-23 21:08 ` [patch 03/38] mips: ath79: " Thomas Gleixner
2011-03-24 14:07 ` Ralf Baechle
2011-03-23 21:08 ` [patch 05/38] mips: cavium-octeon: " Thomas Gleixner
2011-03-23 21:31 ` David Daney
2011-03-24 14:12 ` Ralf Baechle
2011-03-23 21:08 ` [patch 07/38] mips: emma: " Thomas Gleixner
2011-03-24 14:18 ` Ralf Baechle
2011-03-23 21:08 ` [patch 06/38] mips: dec: " Thomas Gleixner
2011-03-24 14:18 ` Ralf Baechle
2011-03-24 15:21 ` Maciej W. Rozycki
2011-03-24 16:16 ` Thomas Gleixner
2011-03-24 18:14 ` Maciej W. Rozycki
2011-03-24 19:29 ` Thomas Gleixner
2011-03-25 0:33 ` Maciej W. Rozycki
2011-03-29 12:56 ` Atsushi Nemoto
2011-03-29 13:20 ` Maciej W. Rozycki
2011-03-23 21:08 ` [patch 08/38] mips: jazz: " Thomas Gleixner
2011-03-24 14:19 ` Ralf Baechle
2011-03-23 21:08 ` [patch 09/38] MIPS: JZ4740: Convert to new irq functions Thomas Gleixner
2011-03-24 14:20 ` Ralf Baechle
2011-03-23 21:08 ` [patch 10/38] MIPS: JZ4740: GPIO: Use shared irq chip for all gpios Thomas Gleixner
2011-03-24 12:15 ` Sergei Shtylyov
2011-03-24 12:59 ` Thomas Gleixner
2011-03-24 14:28 ` Ralf Baechle
2011-03-23 21:08 ` [patch 11/38] mips: jz4740: Cleanup the mechanical irq_chip conversion Thomas Gleixner
2011-03-24 14:29 ` Ralf Baechle
2011-03-23 21:08 ` [patch 12/38] misp: lasat: Convert to new irq_chip functions Thomas Gleixner
2011-03-24 14:31 ` Ralf Baechle
2011-03-23 21:08 ` [patch 13/38] mips: i8259: " Thomas Gleixner
2011-03-24 14:32 ` Ralf Baechle
2011-03-23 21:08 ` [patch 14/38] mips: gic: " Thomas Gleixner
2011-03-24 12:22 ` Sergei Shtylyov
2011-03-24 14:34 ` Ralf Baechle
2011-03-23 21:08 ` [patch 16/38] mips: msc01: " Thomas Gleixner
2011-03-24 14:35 ` Ralf Baechle
2011-03-23 21:08 ` [patch 15/38] mips: gt641: " Thomas Gleixner
2011-03-24 14:34 ` Ralf Baechle
2011-03-23 21:09 ` [patch 17/38] mips: rm7000: " Thomas Gleixner
2011-03-24 14:35 ` Ralf Baechle
2011-03-23 21:09 ` [patch 18/38] mips: rm9000: " Thomas Gleixner
2011-03-24 14:36 ` Ralf Baechle
2011-03-23 21:09 ` [patch 20/38] mips: txx9: Convert core " Thomas Gleixner
2011-03-24 14:39 ` Ralf Baechle
2011-03-23 21:09 ` [patch 19/38] misp: irq_cpu: Convert " Thomas Gleixner
2011-03-24 12:28 ` Sergei Shtylyov
2011-03-24 14:37 ` Ralf Baechle
2011-03-23 21:09 ` [patch 21/38] mips: smtc: Use irq_data in smtc_forward_irq() Thomas Gleixner
2011-03-24 14:40 ` Ralf Baechle
2011-03-23 21:09 ` [patch 22/38] mips: smtc: Cleanup the hook mess and use irq_data Thomas Gleixner
2011-03-24 14:40 ` Ralf Baechle
2011-03-23 21:09 ` [patch 23/38] mips: Use generic show_interrupts() Thomas Gleixner
2011-03-24 14:41 ` Ralf Baechle
2011-03-23 21:09 ` Thomas Gleixner [this message]
2011-03-24 14:44 ` [patch 25/38] mips: pmc-sierra: Convert to new irq_chip functions Ralf Baechle
2011-03-23 21:09 ` [patch 24/38] mips: loongson: " Thomas Gleixner
2011-03-24 14:43 ` Ralf Baechle
2011-03-23 21:09 ` [patch 26/38] mips: pnx83xx: " Thomas Gleixner
2011-03-24 14:44 ` Ralf Baechle
2011-03-23 21:09 ` [patch 28/38] mips: powertv: " Thomas Gleixner
2011-03-24 14:47 ` Ralf Baechle
2011-03-23 21:09 ` [patch 27/38] mips: pnx855: " Thomas Gleixner
2011-03-24 12:32 ` Sergei Shtylyov
2011-03-24 14:45 ` Ralf Baechle
2011-03-23 21:09 ` [patch 29/38] mips: rb532: " Thomas Gleixner
2011-03-24 14:53 ` Ralf Baechle
2011-03-23 21:09 ` [patch 30/38] mips: sgi-ip22: " Thomas Gleixner
2011-03-24 14:49 ` Ralf Baechle
2011-03-23 21:09 ` [patch 31/38] mips: sgi-ip27: " Thomas Gleixner
2011-03-24 14:50 ` Ralf Baechle
2011-03-23 21:09 ` [patch 32/38] mips: sgi32: " Thomas Gleixner
2011-03-24 14:50 ` Ralf Baechle
2011-03-23 21:09 ` [patch 33/38] mips: sybyte: " Thomas Gleixner
2011-03-24 14:51 ` Ralf Baechle
2011-03-23 21:09 ` [patch 34/38] mips: sni: " Thomas Gleixner
2011-03-24 14:52 ` Ralf Baechle
2011-03-23 21:09 ` [patch 35/38] mips: txx9: " Thomas Gleixner
2011-03-24 14:53 ` Ralf Baechle
2011-03-23 21:09 ` [patch 36/38] mips: vr41: " Thomas Gleixner
2011-03-24 12:36 ` Sergei Shtylyov
2011-03-24 14:55 ` Ralf Baechle
2011-03-23 21:09 ` [patch 37/38] mips: vr41xx: Cleanup the direct access to irq_desc[] Thomas Gleixner
2011-03-24 12:44 ` Sergei Shtylyov
2011-03-24 13:00 ` Thomas Gleixner
2011-03-24 13:56 ` Sergei Shtylyov
2011-03-24 14:21 ` Thomas Gleixner
2011-03-24 15:12 ` Ralf Baechle
2011-03-23 21:09 ` [patch 38/38] mips: Select GENERIC_HARDIRQS_NO_DEPRECATED Thomas Gleixner
2011-03-24 14:15 ` Ralf Baechle
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