From: Guenter Roeck <linux@roeck-us.net>
To: David Daney <ddaney.cavm@gmail.com>
Cc: devicetree-discuss@lists.ozlabs.org,
Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
spi-devel-general@lists.sourceforge.net,
linux-kernel@vger.kernel.org, linux-mips@linux-mips.org,
linux-doc@vger.kernel.org, David Daney <david.daney@cavium.com>
Subject: Re: [2/2] spi: Add SPI master controller for OCTEON SOCs.
Date: Tue, 21 Aug 2012 12:49:36 -0700 [thread overview]
Message-ID: <20120821194936.GA7145@roeck-us.net> (raw)
In-Reply-To: <1336772086-17248-3-git-send-email-ddaney.cavm@gmail.com>
On Fri, May 11, 2012 at 08:34:46PM -0000, David Daney wrote:
> From: David Daney <david.daney@cavium.com>
>
> Add the driver, link it into the kbuild system and provide device tree
> binding documentation.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
>
[ ... ]
> +
> +static int __devexit octeon_spi_remove(struct platform_device *pdev)
> +{
> + struct octeon_spi *p = platform_get_drvdata(pdev);
> + struct spi_master *master = p->my_master;
> +
> + spi_unregister_master(master);
> +
I know it is a bit late, but ...
The call to spi_unregister_master() frees the memory associated with master,
ie 'p', and the spi_master_put() below without matching spi_master_get() is
unnecessary/wrong. One possible fix would be to use
struct spi_master *master = spi_master_get(p->my_master);
above. That protects master and p while it is still being used, and makes use
of the call to spi_master_put() below. Another option might be to move
cvmx_write_csr() ahead of the call to spi_unregister_master() and drop the
call to spi_master_put().
Guenter
> + /* Clear the CSENA* and put everything in a known state. */
> + cvmx_write_csr(p->register_base + OCTEON_SPI_CFG, 0);
> + spi_master_put(master);
> + return 0;
> +}
> +
next prev parent reply other threads:[~2012-08-21 19:49 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-11 21:34 [PATCH 0/2] MIPS/spi: New driver for SPI master controller for OCTEON SOCs David Daney
2012-05-11 21:34 ` [PATCH 1/2] MIPS: OCTEON: Add register definitions for SPI host hardware David Daney
2012-05-14 20:02 ` Linus Walleij
2012-05-20 5:23 ` Grant Likely
2012-08-21 18:23 ` John Crispin
2012-05-11 21:34 ` [PATCH 2/2] spi: Add SPI master controller for OCTEON SOCs David Daney
2012-05-14 5:46 ` Shubhrajyoti Datta
2012-05-14 18:13 ` David Daney
2012-05-20 5:26 ` Grant Likely
2012-05-20 5:26 ` Grant Likely
2012-05-14 20:07 ` Linus Walleij
2012-05-20 5:46 ` Grant Likely
2012-08-21 19:30 ` David Daney
2012-08-21 18:23 ` John Crispin
2012-08-21 18:33 ` David Daney
2012-08-21 18:35 ` John Crispin
2012-08-21 18:40 ` David Daney
2012-08-21 18:40 ` John Crispin
2012-08-21 19:49 ` Guenter Roeck [this message]
2012-08-21 20:38 ` [2/2] " David Daney
2012-08-21 20:38 ` David Daney
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